ECE

EC5012: VLSI Signal Processing Syllabus for ECE 8th Sem 2019 Regulation Anna University (Professional Elective-VI)

VLSI Signal Processing detailed syllabus for Electronics & Communication Engineering (ECE) for 2019 regulation curriculum has been taken from the Anna Universities official website and presented for the ECE students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.

For Electronics & Communication Engineering 8th Sem scheme and its subjects, do visit ECE 8th Sem 2019 regulation scheme. For Professional Elective-VI scheme and its subjects refer to ECE Professional Elective-VI syllabus scheme. The detailed syllabus of vlsi signal processing is as follows.

VLSI Signal Processing

Course Objective:

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
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Unit I

Pipelining and Parallel Processing
Introduction to DSP Systems, Typical DSP algorithms, Data flow graph representations, Loop bound and Iteration bound, Longest Path Matrix algorithm; Pipelining and Parallel processing of FIR digital filters, Pipelining and Parallel processing for low power.

Unit II

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
Get it on Google Play.

Unit III

Fast Convolution and Combined Pipelining and Parallel Processing of IIr Filters
Fast convolution – Cook-Toom algorithm, Modified Cook-Took algorithm; Pipelined and parallel recursive adaptive filters, Look- Ahead pipelining in first- order IIR filters, Look- Ahead pipelining with power-of-two decomposition, Clustered Look-Ahead pipelining, parallel processing of IIR filters, combined pipelining and parallel processing of IIR filters, pipelined adaptive digital filters, relaxed look-ahead, pipelined LMS adaptive filter.

Unit IV

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
Get it on Google Play.

Unit V

Numerical Strength Reduction and Wave Pipelining
Numerical Strength Reduction – subexpression elimination, Multiple Constant Multiplications, Synchronous pipelining and Clocking styles, Clock skew in edge-triggered single-phase clocking, Wave pipelining.

Course Outcome:

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
Get it on Google Play.

Text Books:

  1. KeshabK.Parhi, “VLSI Digital Signal Processing Systems”, Design and implementation Wiley, Inter Science, Reprint 2008.

References:

  1. Mohammed Ismail and Terri Fiez, “Analog VLSI Signal and Information Processing”, McGraw-Hill, 1994.
  2. S.Y. Kung, H.J. White House, T. Kailath, “VLSI and Modern Signal Processing”, Prentice Hall, 1985.
  3. Jose E. France, YannisT sividis, “Design of Analog – Digital VLSI Circuits for Telecommunication and Signal Processing”, Prentice Hall, 1994.

For detailed syllabus of all the other subjects of Electronics & Communication Engineering 8th Sem, visit ECE 8th Sem subject syllabuses for 2019 regulation.

For all Electronics & Communication Engineering results, visit Anna University ECE all semester results direct link.

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