6th Sem, ECE

Vlsi Design Ece 6th Sem Syllabus for BE 2017 Regulation Anna Univ

Vlsi Design detail syllabus for Electronics And Communication Engineering (Ece), 2017 regulation is taken from Anna University official website and presented for students of Anna University. The details of the course are: course code (EC8095), Category (PC), Contact Periods/week (3), Teaching hours/week (3), Practical Hours/week (0). The total course credits are given in combined syllabus.

For all other ece 6th sem syllabus for be 2017 regulation anna univ you can visit Ece 6th Sem syllabus for BE 2017 regulation Anna Univ Subjects. The detail syllabus for vlsi design is as follows.”

Course Objective:

  • Study the fundamentals of CMOS circuits and its characteristics.
  • Learn the design and realization of combinational and sequential digital circuits.
  • Architectural choices and performance tradeoffs involved in designing and realizing the circuits in CMOS technology are discussed
  • Learn the different FPGA architectures and testability of VLSI circuits.

Unit I

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Unit II

Combinational Mos Logic Circuits
Circuit Families: Static CMOS, Ratioed Circuits, Cascode Voltage Switch Logic, Dynamic Circuits, Pass Transistor Logic, Transmission Gates, Domino, Dual Rail Domino, CPL, DCVSPG, DPL, Circuit Pitfalls.
Power: Dynamic Power, Static Power, Low Power Architecture.

Unit III

Sequential Circuit Design
Static latches and Registers, Dynamic latches and Registers, Pulse Registers, Sense Amplifier Based Register, Pipelining, Schmitt Trigger, Monostable Sequential Circuits, Astable Sequential Circuits.
Timing Issues : Timing Classification Of Digital System, Synchronous Design.

Unit IV

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Unit V

Implementation Strategies and Testing
FPGA Building Block Architectures, FPGA Interconnect Routing Procedures. Design for Testability: Ad Hoc Testing, Scan Design, BIST, IDDQ Testing, Design for Manufacturability, Boundary Scan.

Course Outcome:

Upon completion of the course, the students will be able to:

  • Realize the concepts of digital building blocks using MOS transistor.
  • Design combinational MOS circuits and power strategies.
  • Design and construct Sequential Circuits and Timing systems.
  • Design arithmetic building blocks and memory subsystems.
  • Apply and implement FPGA design flow and testing.

Text Books:

  1. Neil H.E. Weste, David Money Harris CMOS VLSI Design: A Circuits and Systems Perspective, 4th Edition, Pearson , 2017 (Unit I,II,V)
  2. Jan M. Rabaey ,Anantha Chandrakasan, Borivoje. Nikolic, Digital Integrated Circuits:A Design perspective, Second Edition , Pearson , 2016.(Unit III,IV)

References:

  1. M.J. Smith, Application Specific Integrated Circuits, Addisson Wesley, 1997
  2. Sung-Mo kang, Yusuf leblebici, Chulwoo Kim CMOS Digital Integrated Circuits:Analysis and Design,4th edition McGraw Hill Education,2013
  3. Wayne Wolf, Modern VLSI Design: System On Chip, Pearson Education, 2007
  4. R.Jacob Baker, Harry W.LI., David E.Boyee, CMOS Circuit Design, Layout and Simulation, Prentice Hall of India 2005.

For detail syllabus of all other subjects of BE Ece, 2017 regulation do visit Ece 6th Sem syllabus for 2017 Regulation.

Dont forget to download iStudy for latest syllabus and results, class timetable and more.

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