6th Sem, ECE

EC5651: Digital VLSI Syllabus for ECE 6th Sem 2019 Regulation Anna University

Digital VLSI detailed syllabus for Electronics & Communication Engineering (ECE) for 2019 regulation curriculum has been taken from the Anna Universities official website and presented for the ECE students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.

For Electronics & Communication Engineering 6th Sem scheme and its subjects, do visit ECE 6th Sem 2019 regulation scheme. The detailed syllabus of digital vlsi is as follows.

Digital VLSI

Course Objective:

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
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Unit I

Mos Transistor Principles
MOS Technology and VLSI, Pass transistors, NMOS, CMOS Fabrication process and Electrical properties of CMOS circuits and Device modelling. Characteristics of CMOS inverter, Scaling principles and fundamental limits. Propagation Delays, CMOS inverter scaling, Stick diagram, Layout diagrams, Elmore”s constant, Logical Effort. Case study: Study of technology development in MOS.

Unit II

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
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Unit III

Sequential Logic Circuits
Static and Dynamic Latches and Registers, Timing Issues, Pipelines, Clocking strategies, Memory Architectures, and Memory control circuits.

Unit IV

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
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Unit V

Implementation Strategies
Full Custom and Semicustom Design, Standard Cell design and cell libraries, FPGA building block architectures, FPGA interconnect routing procedures. Demo: Complete ASIC flow using Backend tool and fabrication flow Overall case study: Development of IC in commercial aspects (design, testing and fab cost)

Course Outcome:

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
Get it on Google Play.

Text Books:

  1. Jan Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated circuits: A Design Perspective”, Prentice Hall of India, 2nd Edition, 2003.

References:

  1. N.Weste, K.Eshraghian, “Principles of CMOS VLSI DESIGN”, A system Perspective, 2nd Edition, Addision Wesley, 2004.
  2. A.Pucknell, Kamran Eshraghian, “BASIC VLSI DESIGN”, Prentice Hall of India, 3rd Edition, 2007.
  3. M.J. Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997.
  4. R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and Simulation”, Prentice Hall of India, 2005.

For detailed syllabus of all other subjects of Electronics & Communication Engineering, 2019 regulation curriculum do visit ECE 6th Sem subject syllabuses for 2019 regulation.

For all Electronics & Communication Engineering results, visit Anna University ECE all semester results direct link.

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