EC3561: VLSI Laboratory syllabus for ETE 2021 regulation

VLSI Laboratory detailed syllabus for Electronics & Telecommunication Engineering (ETE) for 2021 regulation curriculum has been taken from the Anna University official website and presented for the ETE students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.

For Electronics & Telecommunication Engineering 5th Sem scheme and its subjects, do visit ETE 5th Sem 2021 regulation scheme. The detailed syllabus of vlsi laboratory is as follows.

Course Objectives:

• To learn Hardware Descriptive Language (Verilog/VHDL).
• To learn the fundamental principles of Digital System Desing using HDL and FPGA.
• To learn the fundamental principles of VLSI circuit design in digital domain
• To learn the fundamental principles of VLSI circuit design in analog domain
• To provide hands on design experience with EDA platforms.

List of Experiments:

1. Design of basic combinational and sequential (Flip-flops) circuits using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
2. Design an Adder ; Multiplier (Min 8 Bit) using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
3. Design and implement Universal Shift Register using HDL. Simulate it using Xilinx/Altera Software
4. Design Memories using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
5. Design Finite State Machine (Moore/Mealy) using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
6. Design 3-bit synchronous up/down counter using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
7. Design 4-bit Asynchronous up/down counter using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera FPGA
8. Design and simulate a CMOS Basic Gates & Flip-Flops. Generate Manual/Automatic Layout .
9. Design and simulate a 4-bit synchronous counter using a Flip-Flops. Generate Manual/Automatic Layout
10. Design and Simulate a CMOS Inverting Amplifier.
11. Design and Simulate basic Common Source, Common Gate and Common Drain Amplifiers.
12. Design and simulate simple 5 transistor differential amplifier.

Course Outcomes:

On completion of the course, students will be able to:

1. Write HDL code for basic as well as advanced digital integrated circuit
2. Import the logic modules into FPGA Boards
3. Synthesize Place and Route the digital Ips
4. Design, Simulate and Extract the layouts of Digital & Analog IC Blocks using EDA tools
5. Test and Verification of IC design

For detailed syllabus of all other subjects of Electronics & Telecommunication Engineering, 2021 regulation curriculum do visit ETE 5th Sem subject syllabuses for 2021 regulation.

For all Electronics & Telecommunication Engineering results, visit Anna University ETE all semester results direct link.