4th Sem, CSE

Computer Architecture Cse 4th Sem Syllabus for BE 2017 Regulation Anna Univ

Computer Architecture detail syllabus for Computer Science & Engineering (Cse), 2017 regulation is taken from Anna University official website and presented for students of Anna University. The details of the course are: course code (CS8491), Category (PC), Contact Periods/week (3), Teaching hours/week (3), Practical Hours/week (0). The total course credits are given in combined syllabus.

For all other cse 4th sem syllabus for be 2017 regulation anna univ you can visit Cse 4th Sem syllabus for BE 2017 regulation Anna Univ Subjects. The detail syllabus for computer architecture is as follows.”

Course Objective:

  • To learn the basic structure and operations of a computer.
  • To learn the arithmetic and logic unit and implementation of fixed-point and floating point arithmetic unit.
  • To learn the basics of pipelined execution.
  • To understand parallelism and multi-core processors.
  • To understand the memory hierarchies, cache memories and virtual memories.
  • To learn the different ways of communication with I/O devices.

Unit I

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Unit II

Arithmetic for Computers
Addition and Subtraction – Multiplication – Division – Floating Point Representation -Floating Point Operations – Subword Parallelism

Unit III

Processor and Control Unit
A Basic MIPS implementation – Building a Datapath – Control Implementation Scheme -Pipelining – Pipelined datapath and control – Handling Data Hazards and Control Hazards -Exceptions.

Unit IV

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Unit V

Memory and I/O Systems
Memory Hierarchy – memory technologies – cache memory – measuring and improving cache performance – virtual memory, TLBs – Accessing I/O Devices – Interrupts – Direct Memory Access – Bus structure – Bus operation – Arbitration – Interface circuits – USB.

Course Outcome:

On Completion of the course, the students should be able to:

  • Understand the basics structure of computers, operations and instructions.
  • Design arithmetic and logic unit.
  • Understand pipelined execution and design control unit.
  • Understand parallel processing architectures.
  • Understand the various memory systems and I/O communication.

Text Books:

  1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014.
  2. Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.

References:

  1. William Stallings, Computer Organization and Architecture – Designing for Performance, Eighth Edition, Pearson Education, 2010.
  2. John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 2012.
  3. John L. Hennessey and David A. Patterson, Computer Architecture – A Quantitative Approachll, Morgan Kaufmann / Elsevier Publishers, Fifth Edition, 2012.

For detail syllabus of all other subjects of BE Cse, 2017 regulation do visit Cse 4th Sem syllabus for 2017 Regulation.

Dont forget to download iStudy for latest syllabus and results, class timetable and more.

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