Electronics Packaging for B.Tech 7th sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for Electronics Packaging B.Tech (R13) seventhsem is as follows
OBJECTIVES:
- To give a comprehensive introduction to the various packaging types used along with the associated same the thermal, speed, signal and integrity power issues.
- To introduce about CAD used in designing wiring boards
UNIT I : OVERVIEW OF ELECTRONIC SYSTEMS PACKAGING [9 hours]
Definition of a system and history of semiconductors, Products and levels of packaging, Packaging aspects of handheld products, Definition of PWB, Basics of Semiconductor and Process flowchart, Wafer fabrication, inspection and testing, Wafer packaging; Packaging evolution; Chip connection choices, Wire bonding, TAB and flip chip.
UNIT II : SEMICONDUCTOR PACKAGES [9 hours]
Single chip packages or modules (SCM), Commonly used packages and advanced packages; Materials in packages; Thermal mismatch in packages; Multichip modules (MCM)-types; System-in-package (SIP); Packaging roadmaps; Hybrid circuits; Electrical Design considerations in systems packaging, Resistive, Capacitive and Inductive Parasitics, Layout guidelines and the Reflection problem, Interconnection.
UNIT III : CAD FOR PRINTED WIRING BOARDS [9 hours]
Benefits from CAD; Introduction to DFM, DFR & DFT, Components of a CAD package and its highlights, Beginning a circuit design with schematic work and component, layout, DFM check, list and design rules; Design for Reliability,Printed Wiring Board Technologies: Board-level packaging aspects, Review of CAD output files for PCB fabrication; Photo plotting and mask generation, Process flow-chart; Vias; PWB substrates; Surface preparation, Photoresist and application methods; UV exposure and developing; Printing technologies for PWBs, PWB etching; PWB etching; Resist stripping; Screen-printing technology, hrough-hole manufacture process steps; Panel and pattern plating methods, Solder mask for PWBs; Multilayer PWBs; Introduction to, microvias, Microvia technology and Sequential build-up technology process flow for high-density, interconnects
[TOTAL: 45 PERIODS]
OUTCOMES: Given an electronic system PCB or integrated circuit design specifications, the student should be in a position to recommend the appropriate packaging style to be used, and propose a design a design procedure and solution for the same.
TEXT BOOK:
- Rao R. Tummala, “Fundamentals of Microsystems Packaging”, McGraw Hill, NY, 2001
REFERENCE:
- William D. Brown, “Advanced Electronic Packaging”, IEEE Press, 1999.
For all other B.Tech ECE 7th sem syllabus go to Anna University B.Tech ELECTRONICS AND COMMUNICATION ENGINEERING (ECE) 7th Sem Course Structure for (R13) Batch.All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.
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