Anna University B.Tech ECE (R13) 6th Sem VLSI Design Syllabus

VLSI Design Syllabus for B.Tech 6th sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.

The detailed syllabus for VLSI Design B.Tech (R13) sixthsem is as follows

OBJECTIVES:

• In this course, the MOS circuit realization of the various building blocks that is common to any microprocessor or digital VLSI circuit is studied.
• Architectural choices and performance tradeoffs involved in designing and realizing the circuits in CMOS technology are discussed.
• The main focus in this course is on the transistor circuit level design and realization for digital operation and the issues involved as well as the topics covered are quite distinct from those encountered in courses on CMOS Analog IC design.

UNIT I : MOS TRANSISTOR PRINCIPLE        [9 hours]
NMOS and PMOS transistors, Process parameters for MOS and CMOS, Electrical properties of CMOS circuits and device modeling, Scaling principles and fundamental limits, CMOS inverter scaling, propagation delays, Stick diagram, Layout diagrams

UNIT II : COMBINATIONAL LOGIC CIRCUITS        [9 hours]
Examples of Combinational Logic Design, Elmore‟s constant, Pass transistor Logic, Transmission gates, static and dynamic CMOS design, Power dissipation – Low power design principles

UNIT III : SEQUENTIAL LOGIC CIRCUITS       [9 hours]
Static and Dynamic Latches and Registers, Timing issues, pipelines, clock strategies, Memory architecture and memory control circuits, Low power memory circuits, Synchronous and Asynchronous design

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TOTAL: 45 PERIODS

OUTCOMES: Upon completion of the course, students should

• Explain the basic CMOS circuits and the CMOS process technology.
• Discuss the techniques of chip design using programmable devices.
• Model the digital system using Hardware Description Language.

TEXTBOOKS:

• Jan Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated Circuits: A Design Perspective”, Second Edition, Prentice Hall of India, 2003.
• M.J. Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997

REFERENCES:

• N.Weste, K.Eshraghian, “Principles of CMOS VLSI Design”, Second Edition, Addision Wesley 1993
• R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and Simulation”, Prentice Hall of India 2005 3. A.Pucknell, Kamran Eshraghian, “BASIC VLSI Design”, Third Edition, Prentice Hall of India, 2007.

For all other B.Tech ECE 6th sem syllabus go to Anna University B.Tech ELECTRONICS AND COMMUNICATION ENGINEERING (ECE) 6th Sem Course Structure for (R13) Batch.All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.

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