Digital Electronics Syllabus for B.Tech 3rd sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for Digital Electronics B.Tech (R13) thirdsem is as follows
OBJECTIVES:
- To introduce basic postulates of Boolean algebra and shows the correlation between Boolean expressions
- To introduce the methods for simplifying Boolean expressions
- To outline the formal procedures for the analysis and design of combinational circuits
- and sequential circuits
- To introduce the concept of memories and programmable logic devices.
- To illustrate the concept of synchronous and asynchronous sequential circuits
UNIT I : MINIMIZATION TECHNIQUES AND LOGIC GATES [9 hours]
Minimization Techniques: Boolean postulates and laws – De-Morgan‟s Theorem – Principle of Duality – Boolean expression – Minimization of Boolean expressions –– Minterm – Maxterm – Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don‟t care conditions – Quine – Mc Cluskey method of minimization. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive–OR and Exclusive–NOR Implementations of Logic Functions using gates, NAND–NOR implementations – Multi level gate implementations- Multi output gate implementations. TTL and CMOS Logic and their characteristics – Tristate gates
UNIT II : COMBINATIONAL CIRCUITS [9 hours]
Design procedure – Half adder – Full Adder – Half subtractor – Full subtractor – Parallel binary adder, parallel binary Subtractor – Fast Adder – Carry Look Ahead adder – Serial Adder/Subtractor – BCD adder – Binary Multiplier – Binary Divider – Multiplexer/ Demultiplexer – decoder – encoder – parity checker – parity generators – code converters – Magnitude Comparator.
UNIT III : SEQUENTIAL CIRCUITS [9 hours]
Latches, Flip-flops – SR, JK, D, T, and Master-Slave – Characteristic table and equation –Application table – Edge triggering – Level Triggering – Realization of one flip flop using other flip flops – serial adder/subtractor- Asynchronous Ripple or serial counter – Asynchronous Up/Down counter – Synchronous counters – Synchronous Up/Down counters – Programmable counters – Design of Synchronous counters: state diagram- State table –State minimization –State assignment – Excitation table and maps-Circuit implementation – Modulo–n counter, Registers – shift registers – Universal shift registers – Shift register counters – Ring counter – Shift counters – Sequence generators.
TOTAL: 45 PERIODS
OUTCOMES: Students will be able to:
- Analyze different methods used for simplification of Boolean expressions.
- Design and implement Combinational circuits.
- Design and implement synchronous and asynchronous sequential circuits.
- Write simple HDL codes for the circuits.
TEXT BOOK:
- M. Morris Mano, “Digital Design”, 4th Edition, Prentice Hall of India Pvt. Ltd., 2008 / Pearson Education (Singapore) Pvt. Ltd., New Delhi, 2003.
REFERENCES:
- John F.Wakerly, “Digital Design”, Fourth Edition, Pearson/PHI, 2008
- John.M Yarbrough, “Digital Logic Applications and Design”, Thomson Learning, 2006.
- Charles H.Roth. “Fundamentals of Logic Design”, 6th Edition, Thomson Learning, 2013.
- Donald P.Leach and Albert Paul Malvino, “Digital Principles and Applications”, 6th Edition, TMH, 2006. AULibrary.com
- 5. Thomas L. Floyd, “Digital Fundamentals”, 10th Edition, Pearson Education Inc, 2011
- Donald D.Givone, “Digital Principles and Design”, TMH, 2003.
For all other B.Tech ECE 3rd sem syllabus go to Anna University B.Tech Electronics and Communication Engineering (ECE) 3rd Sem Course Structure for (R13) Batch.All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.
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