Computer Architecture detail TNDTE Diploma syllabus for Computer Engineering (CS), M scheme is extracted from TNDTE official website and presented for diploma students. The course code (35241), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below. The syllabus PDFs can be downloaded from official website.
For all other computers 4th sem syllabus for diploma m scheme tndte you can visit Computers 4th Sem Syllabus for Diploma M Scheme TNDTE Subjects. The detail syllabus for computer architecture is as follows.
Rationale:
Diploma in Computer Engineering have to be conversant with computer, its terminology and functioning. Computer Architecture is concerned with the structure and behavior of the various functional modules of the computer and their interaction, the course provides the necessary understanding of the hardware operation of digital computers.
Objectives:
On completion of the following units of syllabus contents, the students must be able to
- Know the fundamental blocks of computer
- Realize the function of I/O in different operation modes
- Use of I/O processor
- Know about different memory types and their operations
- Study about the fundamental blocks of CPU
- Know about the computer arithmetic
- Study the different processors
Unit 1
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Unit 2
Input Output Module
- Input output Interface :
- Asynchronous data transfer:
- Modes of transfer
- I/O Processor: CPU-IOP communication. Serial communication 1 Hr
Need for I/O interface, I/O bus and interface, I/O commands, Example of I/O interface
strobe control, handshaking, Asynchronous serial transfer, Asynchronous communication interface
Programmed I/O,Interrupt initiated I/O-vectored interrupt, non-vectored interrupt, Priority interrupt, Interrupt controller ,DMA -DMA controller, DMA transfer
Unit 3
Memory Module
- . Memory types:
- Main Memory:
- Secondary Memory:
- Cache:
- Memory Management :
CPU registers, Main memory, Secondary memory, Cache 1Hr
ROM, RAM, Memory address map, memory connection to CPU
Magnetic tape , Magnetic Disk 1 Hr
Need for cache memory, operational principle, Cache initialization, Different mapping techniques, Writing into cache
Virtual memory concept-virtual address, physical address, memory table for mapping a virtual address, address mapping using pages, Associative memory page table, Page replacement technique
Unit 4
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Unit 5
Architecture And Concepts Of Advanced Processors
- Symmetric Multiprocessors:
- Multithreading and clusters:
- NUMA and vector:
- Multi Core :
Organizations, a mainframe
Implicit and explicit multi threading, cluster configuration
NUMA organizations and approaches to vector computation
Multicore organization
Text Books:
- COMPUTER SYSTEM ARCHITECTURE M.MORRIS MANO Prentice -Hall of India Pvt Limited THIRD EDITION
- COMPUTER ORGANIZATION AND ARCHITECTURE designing for performance William Stallings Pearson Publications. Eighth Edition
Reference Books:
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For detail syllabus of all other subjects of BE Computers, M scheme do visit Computers 4th Sem syllabus for M scheme.
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