M.Tech, Syllabus

JNTUH M.Tech 2017-2018 (R17) Detailed Syllabus VLSI and DSP Architectures

VLSI and DSP Architectures Detailed Syllabus for VLSI/ VLSI Design/VLSI System Design M.Tech first year second sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.

The detailed syllabus for VLSI and DSP Architectures M.Tech 2017-2018 (R17) first year second sem is as follows.

M.Tech. I Year II Sem.

UNIT – I : Essential feature of Instruction set architectures of CISC, RISC and DSP processors and their implications for implementation as VLSI Chips, Micro programming approaches for implementation of control part of the processor. Assessing understanding performance, Introduction, CPU performance and its factors, evaluating performance, real stuff: Two spec bench marks and performance of recent INTEL processors, fallacies and pitfalls

UNIT – II : Data Path and Control: Introduction, logic design conventions, building a data path, a simple implementation scheme, a multi cycle implementation, exceptions, micro programming: simplifying control design, an introduction to digital design using hardware description language, fallacies and pitfalls

UNIT – III : Enhancing performance with pipeline: An overview of pipelining, a pipe lined data path. Pipe lined control, data hazards and forwarding, data hazards and stalls, branch hazards using a hard ware description language to describe and model a pipe line, exceptions, advanced pipelining: extracting more performance, fallacies and pitfalls

UNIT – IV : Computational Accuracy in DSP implementations: Introduction, number formats for signals and coefficients in DSP system, dynamic range and precision, sources of errors in DSP implementations, A/D conversion errors, DSP computational errors, D /A conversion errors

UNIT – V : Architectures for programmable digital signal processing devices: Introduction, basic architectural features, DSP Computational building blocks, bus architecture and memory, data addressing capabilities, address generation unit, programmability and program execution, speed issues, features for external interfacing.

TEXT BOOKS:

  • D. A, Patterson and J.L Hennessy, “Computer Organization and Design: Hardware/ Software Interface”, 4th Ed., Elsevier, 2011
  • A. S Tannenbaum, “Structural Computer organization”, 4th Ed., Prentice-Hall, 1999

REFERENCE BOOKS:

  • W. Wolf, “Modern VLSI Design: System on Silicon”, 2nd Ed., Person Education,1998
  • Keshab Parhi, “VLSI Digital Signal Processing system design and implementations”, Wiley 1999
  • Avatar sign, Srinivasan S, “Digital Signal Processing implementations using DSP microprocessors with examples”, Thomson 4th reprint, 2004.

For all other M.Tech 1st Year 2nd Sem syllabus go to JNTUH M.Tech VLSI/ VLSI Design/VLSI System Design 1st Year 2nd Sem Course Structure for (R17) Batch.

All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.

Do share with friends and in case of questions please feel free drop a comment.

Leave a Reply

Your email address will not be published. Required fields are marked *

*

This site uses Akismet to reduce spam. Learn how your comment data is processed.