JNTUH First Year Second Sem VLSI/ VLSI Design/VLSI System Design Course Structure for M.Tech 2017 – 2018 (R17) Batch

JNTUH First Year Second Sem VLSI/ VLSI Design/VLSI System Design Course Structure for M.Tech 2017 – 2018 (R17) Batch gives your details about the course structure of M.Tech first year second sem. This post gives you details about subjects for first year second sem such as course codes, course names, credits and hours of lectures, tutorials and practice labs. For detailed information click the links in table. JNTUH M.Tech First Year Second Sem VLSI/ VLSI Design/VLSI System Design Course Structure 2017 – 2018 (R17) Batch is as follows.

No	Category	Course Title	Int. marks	Ext. marks	L	T	P	C
1	PC – 4	Low Power VLSI Design	25	75	4	0	0	4
2	PC – 5	Design for Testability	25	75	4	0	0	4
3	PC – 6	CMOS Mixed Signal Circuit Design	25	75	4	0	0	4
4	PE – 3	1. VLSI and DSP Architectures 2. Full custom IC Design 3. Verilog Hardware Description Language	25	75	3	0	0	3
5	PE – 4	1. RF IC Design 2. System on Chip Architecture 3. Scripting Languages	25	75	3	0	0	3
6	OE – 2	*Open Elective	25	75	3	0	0	3
7	Laboratory II	Analog IC Design Lab	25	75	0	0	3	2
8	Seminar-II	Seminar-II	100	0	0	0	3	2
9	Total Credits	Total	275	525	21	0	6	25

L / P/ C : Stand for (L – Theory P – Practical/Drawing C – Credits) All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates. Do share with friends and in case of questions please feel free drop a comment.

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