Digital Design and HDL Lab Syllabus for VTU BE/B.Tech Biomedical Engineering third sem complete syllabus covered here. This will help you understand complete curriculum along with details such as exam marks and duration. The details are as follows.
| Subject Code | 15EI/BM/ML L37 | IA Marks | 20 |
|---|---|---|---|
| Number of Lecture Hours/Week | 03 | Exam Marks | 80 |
| Total Number of Lecture Hours | 42 | Exam Hours | 3 |
CREDITS – 04
Course Objectives: This laboratory course enables students to get practical knowledge & experience in design, assembly and evaluation/testing of
- Rectifier circuits without and with filter
- BJT as Amplifier without and with feedback
- JFET Characteristics and as Amplifier.
- MOSFET Characteristics
- BJT as Power Amplifiers
- Oscillators using BJT and FET for frequency generation
- UJT characteristics
- Verification of Theorems and applications in practical fields
| Laboratory Experiments NOTE: The experiments are to be carried using discrete components only | Revised Bloom’s Taxonomy (RBT) Level |
|---|---|
| 1. To design and testing of the following rectifiers with and without filters: (a) Full Wave Rectifier (center tap) (b) Bridge Rectifier. | L3, l4, L5, L6 |
| L1, L2, L3, L4 | |
| 3. To design and test the common emitter amplifier (voltage divider bias) without feedback and determine input, output impedance, gain and bandwidth. | L3, l4, L5, L6 |
| 4. To design and test the Emitter follower amplifier (BJT) using voltage divider bias and determine input, output impedance, gain and bandwidth. | L3, l4, L5, L6 |
| 5. To plot the Drain and Transfer characteristic for the given FET and to find the Drain Resistance and Trans-conductance. | L1, L2, L3, L4 |
| 6. To design, test and to plot the frequency response of Common Source JFET/MOSFET amplifier, and to determine its bandwidth. | L3, l4, L5, L6 |
| 7. To plot the input and output characteristics of n-channel MOSFET and calculate its parameters, namely; drain resistance, mutual conductance and amplification factor. | L1, L2, L3, L4 |
| 8. Wiring and testing of Complimentary symmetry class B push pull power amplifier and calculation of efficiency. | L1, L2, L3, L4 |
| 9. To design and test the RC-Phase shift Oscillator using BJT for the given frequency. | L3, l4, L5, L6 |
| 10. To design and test the following tuned oscillator circuits for the given frequency. (a) Hartley Oscillator using BJT (b) Colpitts Oscillator using FET. | L3, l4, L5, L6 |
| 11. Testing of crystal oscillator and to determine its frequency of oscillation. | L1, L2, L3, L4 |
| 12. Verification of Thevenin’s theorem and Maximum Power Transform theorem for the given DC circuits. | L1, L2, L3, L4 |
Revised Bloom’s Taxonomy Levels: L1 – Remembering, L2 – Understanding, L3 – Applying, L4 – Analysing, L5 – Evaluating, and L6 – Creating
Course Outcomes: After studying this course, students will able to:
- Realize Boolean expression using Universal gates / basic gates using ICs and Verilog
- Demonstrate the function of adder/subtractor circuits using gates/ICs & Verilog.
- Design and analyze the Comparator, Multiplexers Decoders, Encoders circuits using ICs and Verilog.
- Design and analysis of different Flip-flops and counters using gates and FFs
- Able to use FPGA/CPLD kits for down loading Verilog codes for shift registers and counters and check output.
Graduate Attributes (as per NBA)
- Engineering Knowledge.
- Problem Analysis.
- Design/Development of solutions
Conduct of Practical Examination:
- All laboratory experiments are to be included for practical examination.
- Students are allowed to pick one experiment from the lot.
- Strictly follow the instructions as printed on the cover page of answer script for breakup of marks.
- Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made zero
Text Books:
- Digital Principals and Design – Donald D Givone,12th reprint, TMH,2008
- HDL Programming VHDLAnd Verilog ByNazeih M. Botros, 2009 reprint, Dreamtech press.
Reference Books:
Digital Logic Applications and Design by John M Yarbrough, Thomson Learning,2001
Fundamentals of HDL- Cyril P R Pearson/Sanguin 2010
For all other BE/B.Tech 3rd Sem Subject syllabus do follow VTU 3rd Sem BE / B.Tech Syllabus CBCS (2015-16) Scheme for Biomedical Engineering Group.
For all other BE/B.Tech 3rd Sem Subject syllabus do follow VTU 3rd Sem BE / B.Tech Syllabus CBCS (2015-16) Scheme for Electronics and Instrumentation Engineering Group.
For all other BE/B.Tech 3rd Sem Subject syllabus do follow VTU 3rd Sem BE / B.Tech Syllabus CBCS (2015-16) Scheme for Medical Electronics Group.
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