Digital Design and Hdl Lab detail syllabus for Electronics & Instrumentation Engineering (Eie), 2017 scheme is taken from VTU official website and presented for VTU students. The course code (17EIL38), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below.
For all other eie 3rd sem syllabus for be 2017 scheme vtu you can visit EIE 3rd Sem syllabus for BE 2017 Scheme VTU Subjects. The detail syllabus for digital design and hdl lab is as follows.
Course Objectives:
This course will enable the students to
- The operation of various logic gates and digital circuits and write the Verilog code.
- Design of logic circuits for combinational and sequential circuits and write Verilog code.
- Synthesis of digital circuits, FFs, shift registers and counters using ICs.
- To use FPGA/CPLD kits for downloading the Verilog code and test the output.
Laboratory Experiments:
For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.
Course Outcomes:
After studying this course, students will able to:
- Realize Boolean expression using Universal gates / basic gates using ICs and Verilog
- Demonstrate the function of adder/subtractor circuits using gates/ICs & Verilog.
- Design and analyze the Comparator, Multiplexers Decoders, Encoders circuits using ICs and Verilog.
- Design and analysis of different Flip-flops and counters using gates and FFs
- Able to use FPGA/CPLD kits for down loading Verilog codes for shift registers and counters and
check output.
Graduate Attributes (as per NBA):
- Engineering Knowledge.
- Problem Analysis.
- Design/Development of solutions
Conduct of Practical Examinations:
For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.
Reference Books:
- Digital Principles and Design – Donald D Givone,12th reprint, TMH,2008
- HDL Programming VHDL and Verilog By Nazeih M. Botros, 2009 reprint, Dreamtech press.
- Digital Logic Applications and Design by John M Yarbrough, Thomson Learning,2001
- Fundamentals of HDL- Cyril P R Pearson/Sanguin 2010
For detail syllabus of all other subjects of BE Eie, 2017 scheme do visit Eie 3rd Sem syllabus for 2017 scheme.
Dont forget to download iStudy for latest syllabus and results, class timetable and more.