Real Time System detailed Syllabus for Electronics & Telecommunication Engineering (ETE), 2018 scheme has been taken from the VTUs official website and presented for the VTU students. For Course Code, Subject Names, Teaching Department, Paper Setting Board, Theory Lectures, Tutorial, Practical/Drawing, Duration in Hours, CIE Marks, Total Marks, Credits and other information, visit full semester subjects post given below. The Syllabus PDF files can also be downloaded from the official website of the university.
For all the other VTU ETE 7th Sem Syllabus for BE 2018 Scheme, visit Electronics & Telecommunication Engineering 7th Sem 2018 Scheme.
For all the (Professional Elective-2) subjects refer to Professional Elective-2 Scheme. The detail syllabus for real time system is as follows.
Course Objectives:
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Module-1
Introduction to Real-Time Systems: Historical background, Elements of a Computer Control System, RTS-Definition, Classification of Real-time Systems, Time Constraints, Classification of Programs. Concepts of Computer Control: Introduction, Sequence Control, Loop Control, Supervisory Control, Centralized Computer Control, Hierarchical Systems. Text: 1.1 to 1.6 and 2.1 to 2.6
Module-2
Computer Hardware Requirements for Real-Time Applications: Introduction, General Purpose Computer, Single Chip Microcomputers and Microcontrollers, Specialized Processors, Process-Related Interfaces, Data Transfer Techniques, Communications, Standard Interface. Text: 3.1 to 3.8
Module-3
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Module-4
Operating Systems: Introduction, Real-Time Multi-Tasking OS, Scheduling Strategies, Priority Structures, Task Management, Scheduler and Real-Time Clock Interrupt Handler, Memory Management, Code Sharing, Resource Control, Task Co-Operation and Communication, Mutual Exclusion. Text: 6.1 to 6.11
Module-5
Design of RTS – General Introduction: Introduction, Specification Document, Preliminary Design, SingleProgram Approach, Foreground/Background System. RTS Development Methodologies: Introduction, Yourdon Methodology, Ward and Mellor Method, Hately and Pirbhai Method. Text: 7.1 to 7.5 and 8.1, 8.2, 8.4,8.5
Course Outcomes:
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Question paper pattern:
- Examination will be conducted for 100 marks with question paper containing 10 full questions, each of 20 marks.
- Each full question can have a maximum of 4 sub questions.
- There will be 2 full questions from each module covering all the topics of the module.
- Students will have to answer 5 full questions, selecting one full question from each module.
- The total marks will be proportionally reduced to 60 marks as SEE marks is 60
Text Book:
Real-Time Computer Control, by Stuart Bennet, 2nd Edn. Pearson Education. 2008
Reference Books:
For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
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For the detail Syllabus of all other subjects of BE (ETE) 7th Sem, visit Electronics & Telecommunication Engineering 7th Sem Subjects.
For all (CBSE & Non-CBSC) BE/B.Tech results, visit VTU BE/B.Tech all semester results.