ECC504: Discrete Time Signal Processing Syllabus for EC 5th Sem 2018 Pattern Mumbai University

Discrete Time Signal Processing detailed syllabus scheme for Electronics & Telecommunication Engineering (EC), 2018 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.

For all other Mumbai University Electronics & Telecommunication Engineering 5th Sem Syllabus 2018 Pattern, do visit EC 5th Sem 2018 Pattern Scheme. The detailed syllabus scheme for discrete time signal processing is as follows.

Discrete Time Signal Processing Syllabus for Electronics & Telecommunication Engineering TE 5th Sem 2018 Pattern Mumbai University

Course Objectives:

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Course Outcomes:

After successful completion of the course student will be able to

• Understand the concepts of discrete-time Fourier transform and fast Fourier transform.
• Apply the knowledge of design of IIR digital filters to meet arbitrary specifications.
• Apply the knowledge of design of FIR digital filters to meet arbitrary specifications.
• Analyze the effect of hardware limitations on performance of digital filters.
• Apply the knowledge of DSP processors for various applications.

Module 1

Discrete Fourier Transform & Fast Fourier Transform 10

1. Definition and Properties of DFT, IDFT, Circular convolution of sequences using DFT and IDFT. Filtering of long data sequences: Overlap-Save and Overlap-Add Method for computation of DFT
2. Fast Fourier Transforms (FFT), Radix-2 decimation in time and decimation in frequency FFT algorithms, inverse FFT, and introduction to composite FFT.

Module 2

IIR Digital Filters 10

1. Types of IIR Filters (Low Pass, High Pass, Band Pass, Band Stop and All Pass), Analog filter approximations: Butterworth, Chebyshev I, Elliptic.
2. Mapping of S-plane to Z-plane, impulse invariance method, bilinear transformation method, Design of IIR digital filters (Butterworth and Chebyshev-I) from Analog filters with examples.
3. Analog and digital frequency transformations with design examples.

Module 3

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
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Module 4

Finite Word Length effects in Digital Filters 06

1. Quantization, truncation and rounding, Effects due to truncation and rounding, Input quantization error, Product quantization error, Coefficient quantization error, Zero-input limit cycle oscillations, Overflow limit cycle oscillations, Scaling.
2. Quantization in Floating Point realization of IIR digital filters, Finite word length effects in FIR digital filters.

Module 5

DSP Processors 06

1. Introduction to General Purpose and Special Purpose DSP processors, fixed point and floating point DSP processor, Computer architecture for signal processing, Harvard Architecture, Pipelining, multiplier and accumulator (MAC), Special Instructions, Replication, On-chip memory, Extended Parallelism.
2. General purpose digital signal processors, Selecting digital signal processors, Special purpose DSP hardware, Architecture of TMS320CX fixed and floating DSP processors.

Module 6

Applications of Digital Signal Processing 06

1. Application of DSP for ECG signals analysis.
2. Application of DSP for Dual Tone Multi Frequency signal detection.
3. Application of DSP for Radar Signal Processing.

Text Books:

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier.
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Reference Books:

1. Proakis J., Manolakis D., “Digital Signal Processing”, 4th Edition, Pearson Education.
2. Sanjit K. Mitra , Digital Signal Processing – A Computer Based Approach – 4th Edition McGraw Hill Education (India) Private Limited.
3. Oppenheim A., Schafer R., Buck J., “Discrete Time Signal Processing”, 2nd Edition, Pearson Education.
4. B. Venkata Ramani and M. Bhaskar, Digital Signal Processors, Architecture, Programming and Applications, Tata McGraw Hill, 2004.
5. L. R. Rabiner and B. Gold, Theory and Applications of Digital Signal Processing”, PrenticeHall of India, 2006.

Internal Assessment:

Assessment consists of two class tests of 20 marks each. The first class test is to be conducted when approximately 40% syllabus is completed and second class test when additional 40% syllabus is completed. The average marks of both the test will be considered for final Internal Assessment. Duration of each test shall be of one hour.

End Semester Examination:

1. Question paper will comprise of 6 questions, each carrying 20 marks.
2. The students need to solve total 4 questions.
3. Question No.1 will be compulsory and based on entire syllabus.
4. Remaining question (Q.2 to Q.6) will be selected from all the modules.

For detail syllabus of all other subjects of Electronics & Telecommunication Engineering (EC) 5th Sem 2018 regulation, visit EC 5th Sem Subjects syllabus for 2018 regulation.