Device Modeling Detailed Syllabus for VLSI/ VLSI Design/VLSI System Design M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for Device Modeling M.Tech 2017-2018 (R17) first year first sem is as follows.
M.Tech. I Year I Sem.
UNIT – I : MOS Capacitor: Energy band diagram of Metal-Oxide-Semiconductor contacts, Mode of Operations: Accumulation, Depletion, Mid gap, and Inversion, 1D Electrostatics of MOS, Depletion Approximation, Accurate Solution of Poisson’s Equation.
UNIT – II : MOS Capacitor Characteristics and Non idealities: CV characteristics of MOS, LFCV and HFCV, Nonidealities in MOS, oxide fixed charges, interfacial charges.
UNIT – III : The MOS transistor: Small signal modeling for low frequency and High frequency, Pao-Sah and Brews models; Short channel effects in MOS transistors.
UNIT – IV : The bipolar transistor: Eber’s-Moll model; charge control model; small-signal models for low and high frequency and switching characteristics.
UNIT – V : FinFETs: I-V characteristics, device capacitances, parasitic effects of extension regions, performance of simple combinational gates and amplifiers, novel circuits using FinFETs and GAA devices.
TEXT BOOKS:
- S. M. Sze, “Physics of Semiconductor Devices”, 2nd Edition, Wiley Eastern, 1981.
- Y. P. Tsividis, “Operation and Modelling of the MOS Transistor”, McGraw-Hill, 1987.
- E. Takeda, “Hot-carrier Effects in MOS Transistors”, Academic Press, 1995.
- P. Colinge, “FinFETs and Other Multi-Gate Transistors”, Springer. 2009
For all other M.Tech 1st Year 1st Sem syllabus go to JNTUH M.Tech VLSI/ VLSI Design/VLSI System Design 1st Year 1st Sem Course Structure for (R17) Batch.
All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.
Do share with friends and in case of questions please feel free drop a comment.