Design for Testability Detailed Syllabus for Embedded Systems & VLSI Design/VLSI and Embedded Systems/ Electronics Design Technology M.Tech first year second sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for Design for Testability M.Tech 2017-2018 (R17) first year second sem is as follows.
M.Tech. I Year II Sem.
UNIT – I : Introduction to Testing: Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI Technology Trends affecting Testing, Types of Testing, Fault Modeling: Defects, Errors and Faults, Functional Versus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.
UNIT – II : Logic and Fault Simulation: Simulation for Design Verification and Test Evaluation, Modeling Circuits for Simulation, Algorithms for True-value Simulation, Algorithms for Fault Simulation, ATPG.
UNIT – III : Testability Measures: SCOAP Controllability and Observability, High Level Testability Measures, Digital DFT and Scan Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.
UNIT – IV : Built-In Self-Test: The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process, Pattern Generation, Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-PerScan BIST Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.
UNIT – V : Boundary Scan Standard: Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary Scan Test Instructions, Pin Constraints of the Standard, Boundary Scan Description Language: BDSL Description Components, Pin Descriptions.
TEXT BOOK:
- M.L. Bushnell, “Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits”, V. D. Agrawal, Kluwer Academic Publishers.
REFERENCE BOOKS:
- M. Abramovici, M.A.Breuer and A.D Friedman, “Digital Systems and Testable Design”, Jaico Publishing House.
- P. K. Lala, “Digital Circuits Testing and Testability”, Academic Press.
For all other M.Tech 1st Year 2nd Sem syllabus go to JNTUH M.Tech Embedded Systems & VLSI Design/VLSI and Embedded Systems/ Electronics Design Technology 1st Year 2nd Sem Course Structure for (R17) Batch.
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