CMOS VLSI Design Detailed Syllabus for Embedded Systems M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for CMOS VLSI Design M.Tech 2017-2018 (R17) first year first sem is as follows.
M.Tech. I Year I Sem.
UNIT-I : MOS Transistor: Introduction, Ideal I-V Characteristics, C-V Characteristics, Non ideal I-V Effects, DC Transfer Characteristics. CMOS Process Technology: CMOS Technologies, Layout Design Rules, CMOS Process Enhancements, Technology related CAD Issues.
UNIT-II : Circuit Characterization: Delay Estimation, Logical effort and Transistor Sizing, Power Dissipation, Interconnect, Design Margin, Reliability, Scaling.
UNIT-III : Combinational and Sequential Circuit Design: Circuit Families, More circuit families, Low power Logic Design, Comparison of Circuit Families, Sequencing Static Circuits, Circuit Design of Latches and Flip-Flops, Static Sequencing Element Methodology, Sequencing Dynamic Circuits, Synchronizers.
UNIT-IV : Datapath Subsystems: Addition, Subtraction, Comparators, Counters, Boolean Logical Operations, Coding, Shifters, Multiplication, Division. Array Subsystems: SRAM, DRAM, Read-only Memory, Serial Access Memories, Content addressable Memory, PLAs, Array Yield, Reliability and Self-Test.
UNIT-V : Design Methodology and Tools: Design Methodology, Design Flows, Design Economics, Data Sheets and Documentation, CMOS Physical Design Styles, Interchange Formats. Special Purpose Subsystem: Packaging.
TEXTBOOKS:
- Neil Weste, David Harris, Ayan Banerjee, “CMOS VLSI DESIGN”, 3rd Edition, Pearson
For all other M.Tech 1st Year 1st Sem syllabus go to JNTUH M.Tech Embedded Systems 1st Year 1st Sem Course Structure for (R17) Batch.
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