M.Tech, Syllabus

JNTUH M.Tech 2017-2018 (R17) Detailed Syllabus ARM Processor Architectures

ARM Processor Architectures Detailed Syllabus for Embedded Systems M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.

The detailed syllabus for ARM Processor Architectures M.Tech 2017-2018 (R17) first year first sem is as follows.

M.Tech. I Year I Sem.

UNIT – I : ARM Architecture and Instruction Set: ARM Design Philosophy, Registers, PSR, Pipeline, Interrupts and Vector Table, Architecture Revision, ARM Processor Families. Instruction Set: Data Processing Instructions, Branch, Load, Store Instructions, PSR Instructions, Conditional Instructions.

UNIT – II : ARM Programming Model: Thumb Instruction Set: Register Usage, Other Branch Instructions, Data
Processing Instructions, Single-Register and Multi Register Load-Store Instructions, Stack, Interrupts, Software Interrupt Instructions, Exception handling

UNIT – III : ARM Programming using High Level Language: Simple C Programs using Function Calls, Pointers, Structures, Integer and Floating Point Arithmetic, Assembly Code using Instruction Scheduling, Register Allocation, Conditional Execution and Loops.

UNIT – IV : Memory Management: Cache Architecture, Polices, Flushing and Caches, MMU, Page Tables, Translation, Access Permissions, Content Switch.

UNIT – V : Integer and Floating Point Arithmetic on ARM: Double precision Integer Multiplication, Division, Square roots, Endian Reversal and Bit Operations, Random Number Generation, DSP on ARM – FIR filters, IIR filters.

TEXT BOOKS:

  • Andrew N. Sloss, Dominic Symes, Chris Wright, “ARM Systems Developer’s Guides- Designing & Optimizing System Software”, 2008, Elsevier.

REFERENCE BOOKS:

  • Jonathan W. Valvano – Brookes / Cole, “Embedded Microcomputer Systems, Real Time Interfacing”, 1999, Thomas Learning

For all other M.Tech 1st Year 1st Sem syllabus go to JNTUH M.Tech Embedded Systems 1st Year 1st Sem Course Structure for (R17) Batch.

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