M.Tech, Syllabus

JNTUH M.Tech 2017-2018 (R17) Detailed Syllabus Advanced Digital System Design

Advanced Digital System Design Detailed Syllabus for Digital Systems & Computer Electronics M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.

The detailed syllabus for Advanced Digital System Design M.Tech 2017-2018 (R17) first year first sem is as follows.

M.Tech. I Year I Sem.

UNIT – I : Processor Arithmetic: Two’s Complement Number System – Arithmetic Operations; Fixed point Number System; Floating Point Number system – IEEE 754 format, Basic binary codes.

UNIT – II : Combinational circuits: CMOS logic design, Static and dynamic analysis of Combinational circuits, timing hazards. Functional blocks – Decoders, Encoders, Three-state devices, Multiplexers, Parity circuits, Comparators, Adders, Subtractors, Carrylook- ahead adder – timing analysis .Combinational multiplier structures.

UNIT – III : Sequential Logic: Latches and Flip-Flops, Sequential logic circuits – timing analysis (Set up and hold times), State machines – Mealy & Moore machines, Analysis, FSM design using D Flip-Flops, FSM optimization and partitioning; Synchronizers and metastability. FSM Design examples: Vending machine, Traffic light controller, Washing machine.

UNIT – IV : Subsystem Design using Functional Blocks (1): Design (including Timing Analysis) of different logical blocks of varying complexities involving mostly combinational circuits:

  • ALU
  • 4-bit combinational multiplier
  • Barrel shifter
  • Simple fixed point to floating point encoder
  • Dual Priority encoder
  • Cascading comparators

UNIT – V : Subsystem Design using Functional Blocks (2): Design, (including Timing Analysis) of different logical blocks of different complexities involving mostly sequential circuits:

  • Pattern (sequence) detector
  • Programmable Up-down counter
  • Round robin arbiter with 3 requesters
  • Process Controller
  • FIFO

TEXT BOOKS:

  • John F. Wakerly, “Digital Design”, Prentice Hall, 3rd Edition, 2002

*Note1: VHDL and ABEL are not part of this course.
*Note2: SSI & MSI ICs listed in data books are not part of this course

For all other M.Tech 1st Year 1st Sem syllabus go to JNTUH M.Tech Digital Systems & Computer Electronics 1st Year 1st Sem Course Structure for (R17) Batch.

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