{"id":8402,"date":"2019-12-15T03:55:04","date_gmt":"2019-12-15T03:55:04","guid":{"rendered":"https:\/\/www.inspirenignite.com\/vtu\/dsp-algorithms-and-architecture-telecom-7th-sem-syllabus-for-vtu-be-2017-scheme-professional-elective-4\/"},"modified":"2019-12-15T03:55:04","modified_gmt":"2019-12-15T03:55:04","slug":"dsp-algorithms-and-architecture-telecom-7th-sem-syllabus-for-vtu-be-2017-scheme-professional-elective-4","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/vtu\/dsp-algorithms-and-architecture-telecom-7th-sem-syllabus-for-vtu-be-2017-scheme-professional-elective-4\/","title":{"rendered":"Dsp Algorithms and Architecture Telecom 7th Sem Syllabus for VTU BE 2017 Scheme (Professional Elective-4)"},"content":{"rendered":"<p>Dsp Algorithms and Architecture detail syllabus for Telecommunication Engineering (Telecom), 2017 scheme is taken from <a href=\"https:\/\/vtu.ac.in\/b-e-scheme-syllabus\/\" target=\"_blank\" rel=\"noopener\">VTU<\/a> official website and presented for VTU students. The course code (17EC751), and for exam duration, Teaching Hr\/week, Practical Hr\/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below.<\/p>\n<p>For all other telecom 7th sem syllabus for be 2017 scheme vtu you can visit <a href=\"..\/telecom-7th-sem-syllabus-for-be-2017-scheme-vtu\">Telecom 7th Sem syllabus for BE 2017 Scheme VTU Subjects<\/a>. For all other Professional Elective-4 subjects do refer to <a href=\"..\/professional-elective-4-telecom-7th-sem-syllabus-for-vtu-be-2017-scheme\">Professional Elective-4<\/a>. The detail syllabus for dsp algorithms and architecture is as follows.<\/p>\n<p><h4>Course Objectives:<\/h4>\n<p> This course will enable students to:<\/p>\n<ul>\n<li>Figure out the knowledge and concepts of digital signal processing techniques.<\/li>\n<li>Understand the computational building blocks of DSP processors and its speed issues.<\/li>\n<li>Understand the various addressing modes, peripherals, interrupts and pipelining structure of TMS320C54xx processor.<\/li>\n<li>Learn how to interface the external devices to TMS320C54xx processor in various modes.<\/li>\n<li>Understand basic DSP algorithms with their implementation.<\/li>\n<\/ul>\n<p><h4>Module 1<br \/>\nFor complete syllabus and results, class timetable and more pls <a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">download iStudy<\/a>. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.<\/p>\n<p><h4>Module 2<br \/>\n<\/h4>\n<p>Architectures for Programmable Digital Signal &#8211; Processing Devices: Introduction, Basic Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed Issues, Features for External Interfacing.\n<\/p>\n<p><h4>Module 3<br \/>\n<\/h4>\n<p>Programmable Digital Signal Processors: Introduction, Commercial Digital Signal-processing Devices, Data Addressing Modes of TMS32OC54XX, Memory Space of TMS32OC54xx Processors, Program Control. Detail Study of TMS320C54X &amp; 54xx Instructions and Programming, On &#8211; Chip Peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.\n<\/p>\n<p><h4>Module 4<br \/>\nFor complete syllabus and results, class timetable and more pls <a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">download iStudy<\/a>. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.<\/p>\n<p><h4>Module 5 <\/h4>\n<p>Interfacing Memory and Parallel I\/O Peripherals to Programmable DSP Devices: Introduction, Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I\/O Interface, Programmed I\/O, Interrupts and I\/O Direct Memory Access (DMA).<br \/>\nInterfacing and Applications of DSP Processors:<br \/>\nIntroduction, Synchronous Serial Interface, A CODEC Interface Circuit, DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image Processing System.\n<\/p>\n<p><h4>Course Outcomes:<\/h4>\n<p> At the end of this course, students would be able to<\/p>\n<ul>\n<li>Comprehend the knowledge and concepts of digital signal processing techniques.<\/li>\n<li>Apply the knowledge of DSP computational building blocks to achieve speed in DSP architecture or processor.<\/li>\n<li>Apply knowledge of various types of addressing modes, interrupts, peripherals and pipelining structure of TMS320C54xx processor.<\/li>\n<li>Develop basic DSP algorithms using DSP processors.<\/li>\n<li>Discuss about synchronous serial interface and multichannel buffered serial port (McBSP) of DSP device.<\/li>\n<li>Demonstrate the programming of CODEC interfacing.<\/li>\n<\/ul>\n<p><h4>Text Books:<\/h4>\n<p>Digital Signal Processing, Avatar Singh and S. Srinivasan, Thomson Learning, 2004.\n<\/p>\n<p><h4>Reference Books:<\/h4>\n<ol>\n<li>Digital Signal Processing: A practical approach, Ifeachor E. C., Jervis B. W Pearson-Education, PHI, 2002.<\/li>\n<li>Digital Signal Processors, B Venkataramani and M Bhaskar, TMH, 2nd, 2010<\/li>\n<li>Architectures for Digital Signal Processing, Peter Pirsch John Weily, 2008<\/li>\n<\/li>\n<\/ol>\n<p>For detail syllabus of all other subjects of BE Telecom, 2017 regulation do visit <a href=\"..\/category\/telecom+7th-sem\">Telecom 7th Sem syllabus for 2017 Regulation<\/a>.<\/p>\n<p>Dont forget to <a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">download iStudy<\/a> for latest syllabus and results, class timetable and more.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Dsp Algorithms and Architecture detail syllabus for Telecommunication Engineering (Telecom), 2017 scheme is taken from VTU official website and presented for VTU students. The course code (17EC751), and for exam [&hellip;]<\/p>\n","protected":false},"author":2298,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[47],"tags":[],"class_list":["post-8402","post","type-post","status-publish","format-standard","hentry","category-telecom"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts\/8402","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/users\/2298"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/comments?post=8402"}],"version-history":[{"count":0,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts\/8402\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/media?parent=8402"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/categories?post=8402"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/tags?post=8402"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}