{"id":569,"date":"2016-09-09T14:42:53","date_gmt":"2016-09-09T14:42:53","guid":{"rendered":"http:\/\/www.inspirenignite.com\/vtu\/?p=569"},"modified":"2019-08-31T14:55:27","modified_gmt":"2019-08-31T14:55:27","slug":"digital-design-hdl-lab-syllabus-vtu-beb-tech","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/vtu\/digital-design-hdl-lab-syllabus-vtu-beb-tech\/","title":{"rendered":"Digital Design and HDL Lab Syllabus for VTU BE\/B.Tech CBCS 2015-16"},"content":{"rendered":"<p>Digital Design and HDL Lab Syllabus for VTU BE\/B.Tech Biomedical Engineering third sem complete syllabus covered here. This will help you understand complete curriculum along with details such as exam marks and duration. The details are as follows.<\/p>\n<table>\n<tbody>\n<tr>\n<th>Subject Code<\/th>\n<th>15EI\/BM\/ML L37<\/th>\n<th>IA Marks<\/th>\n<th>20<\/th>\n<\/tr>\n<tr>\n<td>Number of Lecture Hours\/Week<\/td>\n<td>03<\/td>\n<td>Exam Marks<\/td>\n<td>80<\/td>\n<\/tr>\n<tr>\n<td>Total Number of Lecture Hours<\/td>\n<td>42<\/td>\n<td>Exam Hours<\/td>\n<td>3<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>CREDITS \u2013 04<\/strong><\/p>\n<p><strong>Course Objectives:\u00a0 <\/strong>This laboratory course enables students to get practical knowledge &amp; experience in design, assembly and evaluation\/testing of<\/p>\n<ul>\n<li>Rectifier circuits without and with filter<\/li>\n<li>BJT as Amplifier without and with feedback<\/li>\n<li>JFET Characteristics and as Amplifier.<\/li>\n<li>MOSFET Characteristics<\/li>\n<li>BJT as Power Amplifiers<\/li>\n<li>Oscillators using BJT and FET for frequency generation<\/li>\n<li>UJT characteristics<\/li>\n<li>Verification of Theorems and applications in practical fields<\/li>\n<\/ul>\n<table>\n<tbody>\n<tr>\n<th>Laboratory Experiments<\/p>\n<p>NOTE: The experiments are to be carried using discrete components only<\/th>\n<th>Revised Bloom\u2019s Taxonomy (RBT) Level<\/th>\n<\/tr>\n<tr>\n<td>1. To design and testing of the following rectifiers with and without filters: (a) Full Wave Rectifier (center tap) (b) Bridge Rectifier.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>\n<p style=\"text-align: center\"><a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\"><strong>Download iStudy App (No Ads, No PDFs) for complete VTU syllabus, results, timetables and all other updates.<\/strong><\/a><\/p>\n<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<tr>\n<td>3. To design and test the common emitter amplifier (voltage divider bias) without feedback and determine input, output impedance, gain and bandwidth.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>4. To design and test the Emitter follower amplifier (BJT) using voltage divider bias and determine input, output impedance, gain and bandwidth.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>5. To plot the Drain and Transfer characteristic for the given FET and to find the Drain Resistance and Trans-conductance.<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<tr>\n<td>6. To design, test and to plot the frequency response of Common Source JFET\/MOSFET amplifier, and to determine its bandwidth.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>7. To plot the input and output characteristics of n-channel MOSFET and calculate its parameters, namely; drain resistance, mutual conductance and amplification factor.<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<tr>\n<td>8. Wiring and testing of Complimentary symmetry class B push pull power amplifier and calculation of efficiency.<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<tr>\n<td>9. To design and test the RC-Phase shift Oscillator using BJT for the given frequency.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>10. To design and test the following tuned oscillator circuits for the given frequency. (a) Hartley Oscillator using BJT (b) Colpitts Oscillator using FET.<\/td>\n<td>L3, l4, L5, L6<\/td>\n<\/tr>\n<tr>\n<td>11. Testing of crystal oscillator and to determine its frequency of oscillation.<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<tr>\n<td>12. Verification of Thevenin\u2019s theorem and Maximum Power Transform theorem for the given DC circuits.<\/td>\n<td>L1, L2, L3, L4<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>Revised Bloom\u2019s Taxonomy Levels<\/strong>: L1 \u2013 Remembering, L2 \u2013 Understanding, L3 \u2013 Applying, L4 \u2013 Analysing, L5 \u2013 Evaluating, and L6 &#8211; Creating<\/p>\n<p><strong>Course Outcomes:<\/strong> After studying this course, students will able to:<\/p>\n<ul>\n<li>Realize Boolean expression using Universal gates \/ basic gates using ICs and Verilog<\/li>\n<li>Demonstrate the function of adder\/subtractor circuits using gates\/ICs &amp; Verilog.<\/li>\n<li>Design and analyze the Comparator, Multiplexers Decoders, Encoders circuits using ICs and\u00a0Verilog.<\/li>\n<li>Design and analysis of different Flip-flops and counters using gates and FFs<\/li>\n<li>Able to use FPGA\/CPLD kits for down loading Verilog codes for shift registers and counters and\u00a0check output.<\/li>\n<\/ul>\n<p><strong>Graduate Attributes (as per NBA)<\/strong><\/p>\n<ul>\n<li>Engineering Knowledge.<\/li>\n<li>Problem Analysis.<\/li>\n<li>Design\/Development of solutions<\/li>\n<\/ul>\n<p><strong>Conduct of Practical Examination:<\/strong><\/p>\n<ul>\n<li>All laboratory experiments are to be included for practical examination.<\/li>\n<li>Students are allowed to pick one experiment from the lot.<\/li>\n<li>Strictly follow the instructions as printed on the cover page of answer script for breakup of marks.<\/li>\n<li>Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be\u00a0made zero<\/li>\n<\/ul>\n<p><strong>Text Books:<\/strong><\/p>\n<ul>\n<li>Digital Principals and Design \u2013 Donald D Givone,12th reprint, TMH,2008<\/li>\n<li>HDL Programming VHDLAnd Verilog ByNazeih M. Botros, 2009 reprint, Dreamtech press.<\/li>\n<\/ul>\n<p><strong>Reference Books:<\/strong><\/p>\n<p>Digital Logic Applications and Design by John M Yarbrough, Thomson Learning,2001<\/p>\n<p>Fundamentals of HDL- Cyril P R Pearson\/Sanguin 2010<\/p>\n<p>For all other BE\/B.Tech 3rd Sem Subject syllabus do follow\u00a0<a href=\"https:\/\/www.inspirenignite.com\/vtu\/vtu-third-3rd-sem-biomedical-engineering\/\">VTU 3rd Sem BE \/ B.Tech Syllabus CBCS (2015-16) Scheme for Biomedical Engineering Group.<\/a><\/p>\n<p>For all other BE\/B.Tech 3rd Sem Subject syllabus do follow\u00a0<a href=\"https:\/\/www.inspirenignite.com\/vtu\/vtu-third-3rd-sem-electronics-instrumentation-engineering\/\">VTU 3rd Sem BE \/ B.Tech Syllabus CBCS (2015-16) Scheme for Electronics and Instrumentation Engineering Group.<\/a><\/p>\n<p>For all other BE\/B.Tech 3rd Sem Subject syllabus do follow\u00a0<a href=\"https:\/\/www.inspirenignite.com\/vtu\/vtu-third-3rd-sem-medical-electronics\/\">VTU 3rd Sem BE \/ B.Tech Syllabus CBCS (2015-16) Scheme for Medical Electronics Group.<\/a><\/p>\n<p>For more information about all VTU updates please stay connected to us on FB and don\u2019t hesitate to ask any questions in the comment.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Digital Design and HDL Lab Syllabus for VTU BE\/B.Tech Biomedical Engineering third sem complete syllabus covered here. This will help you understand complete curriculum along with details such as exam [&hellip;]<\/p>\n","protected":false},"author":2259,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[4,32,13,15],"tags":[],"class_list":["post-569","post","type-post","status-publish","format-standard","hentry","category-3rd-sem","category-b-e-b-tech","category-bme","category-syllabus"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts\/569","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/users\/2259"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/comments?post=569"}],"version-history":[{"count":5,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts\/569\/revisions"}],"predecessor-version":[{"id":2964,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/posts\/569\/revisions\/2964"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/media?parent=569"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/categories?post=569"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/vtu\/wp-json\/wp\/v2\/tags?post=569"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}