Switching & Finite Automata Theory detail syllabus for Electronics & Communication Engineering (ECE), 2017 scheme is taken from VTU official website and presented for VTU students. The course code (17EC552), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below.
For all other ece 5th sem syllabus for be 2017 scheme vtu you can visit ECE 5th Sem syllabus for BE 2017 Scheme VTU Subjects. For all other Professional Elective-1 subjects do refer to Professional Elective-1. The detail syllabus for switching & finite automata theory is as follows.
Course Objectives:
This course will enable students to:
- Understand the basics of threshold logic, effect of hazards on digital circuits and techniques of fault detection
- Explain finite state model and minimization techniques
- Know structure of sequential machines, and state identification
- Understand the concept of fault detection experiments
Module 1
For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.
Module 2
Reliable Design and Fault Diagnosis: Hazards, static hazards, Design of Hazard-free Switching Circuits, Fault detection in combinational circuits, Fault detection in combinational circuits: The faults, The Fault Table, Covering the fault table, Fault location experiments: Preset experiments, Adaptive experiments, Boolean differences, Fault detection by path sensitizing. (Sections 8.1, 8.2, 8.3, 8.4, 8.5 of Text)
Module 3
Sequential Machines: Capabilities, Minimization and Transformation The Finite state model and definitions, capabilities and limitations of finite state machines, State equivalence and machine minimization: k-equivalence, The minimization Procedure, Machine equivalence, Simplification of incompletely specified machines. (Section 10.1, 10.2, 10.3, 10.4 of Text)
Module 4
For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.
Module 5
State-Identification and Fault Detection Experiments: Experiments, Homing experiments, Distinguishing experiments, Machine identification, Fault detection experiments, Design of diagnosable machines, Second algorithm for the design of
fault detection experiments. (Sections 13.1, 13.2, 13.3, 13.4, 13.5, 13.6, 13.7 of Text)
Course Outcomes:
At the end of the course, students should be able to:
- Explain the concept of threshold logic
- Understand the effect of hazards on digital circuits and fault detection and analysis
- Define the concepts of finite state model
- Analyze the structure of sequential machine
- Explain methods of state identification and fault detection experiments
Text Books:
Switching and Finite Automata Theory – Zvi Kohavi, McGraw Hill, 2nd edition, 2010 ISBN: 0070993874.
Reference Books:
- Fault Tolerant And Fault Testable Hardware Design-Parag K Lala, Prentice Hall Inc. 1985.
- Digital Circuits and Logic Design.-Charles Roth Jr, Larry L. Kinney, Cengage Learning, 2014, ISBN: 978-1-133-62847-7.
For detail syllabus of all other subjects of BE Ece, 2017 regulation do visit Ece 5th Sem syllabus for 2017 Regulation.
Dont forget to download iStudy for latest syllabus and results, class timetable and more.