Signal Conditioning Circuits and Data Acquisition Lab EIE 5th Sem Syllabus for VTU BE 2017 Scheme

Signal Conditioning Circuits and Data Acquisition Lab detail syllabus for Electronics & Instrumentation Engineering (Eie), 2017 scheme is taken from VTU official website and presented for VTU students. The course code (17EIL57), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below.

For all other eie 5th sem syllabus for be 2017 scheme vtu you can visit EIE 5th Sem syllabus for BE 2017 Scheme VTU Subjects. The detail syllabus for signal conditioning circuits and data acquisition lab is as follows.

Laboratory Experiments:

Note: Standard design procedure to be adopted Students should build the circuit using discrete components and ICs (models are not to be used.

1. To design and implement
• Inverting Amplifier and Inverting Attenuator
• Non-Inverting Amplifier and Voltage Follower
2. To realize
• Full wave Precision rectifier
3. To design and implement
• Butterworth I order Low-pass filter
• Butterworth II order High-pass filter
4. To design and implement
• RC Phase shift oscillator
• Wein Bridge oscillator
5. To realize
• ZCD
• Positive and Negative Voltage level detectors
6. To design and implement
• Astable Multivibrator using 555 timer
• Mono-stable Multivibrator using 555 timer
7. To realize
• Sample and Hold circuit using discrete components
8. To realize
• Programmable Gain Amplifier using Analog Mux
9. To design and implement
• 4 bit R-2R DAC using discrete components
10. To design and implement
• 8-bit DAC using IC (DAC 0800.
11. To design and implement
• 8-bit ADC using IC (ADC 0809.
12. To design and implement
• 3 bit Flash ADC using ICs

Course Outcomes:

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Conduct of Practical Examinations:

1. All laboratory practicals are to be included for practical examination.
2. Students are allowed to pick one experiment from the lot.
3. Strictly follow the instructions as printed on the cover page of answer script for breakup of marks.
4. Change of experiment is allowed only once and 17% Marks allotted to the procedure part to be made zero.

Reference Books:

1. Linear Integrated Circuits, D. Roy Choudhury and Shail B. Jain, 4th edition, Reprint 2010, New Age International.
2. Op – Amps and Linear Integrated Circuits, Ramakant A. Gayakwad, 4th edition, PHI.
3. A course in Electrical & Electronic Measurements & Instrumentation, A K Sawhney, Dhanpat Rai Publications, 19th edition, 2011.
4. Operational Amplifiers and Linear Integrated Circuits, Robert. F. Coughlin &Fred. F. Driscoll, PHI/Pearson, 2006
5. Op – Amps and Linear Integrated Circuits, James M. Fiore, Thomson Learning, 2001
6. Design with Operational Amplifiers and Analog Integrated Circuits, Sergio Franco, TMH, 3e, 2005

For detail syllabus of all other subjects of BE Eie, 2017 scheme do visit Eie 5th Sem syllabus for 2017 scheme.

Dont forget to download iStudy for latest syllabus and results, class timetable and more.