7th Sem, CSE

Advanced Computer Architectures CSE 7th Sem Syllabus for VTU BE 2017 Scheme

Advanced Computer Architectures detail syllabus for Computer Science & Engineering (Cse), 2017 scheme is taken from VTU official website and presented for VTU students. The course code (17CS72), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below.

For all other cse 7th sem syllabus for be 2017 scheme vtu you can visit CSE 7th Sem syllabus for BE 2017 Scheme VTU Subjects. The detail syllabus for advanced computer architectures is as follows.

Module 1

Theory of Parallelism: Parallel Computer Models, The State of Computing, Multiprocessors and Multicomputer, Multivector and SIMD Computers, PRAM and VLSI Models, Program and Network Properties, Conditions of Parallelism, Program Partitioning and Scheduling, Program Flow Mechanisms, System Interconnect Architectures, Principles of Scalable Performance, Performance Metrics and Measures, Parallel Processing Applications, Speedup Performance Laws, Scalability Analysis and Approaches.

Module 2

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Module 3

Bus, Cache, and Shared Memory, Bus Systems, Cache Memory Organizations, Shared Memory Organizations, Sequential and Weak Consistency Models, Pipelining and Superscalar Techniques, Linear Pipeline Processors, Nonlinear Pipeline Processors, Instruction Pipeline Design, Arithmetic Pipeline Design (Upto 6.4).

Module 4

Parallel and Scalable Architectures: Multiprocessors and Multicomputers, Multiprocessor System Interconnects, Cache Coherence and Synchronization Mechanisms, Three Generations of Multicomputers, Message-Passing Mechanisms, Multivector and SIMD Computers, Vector Processing Principles, Multivector Multiprocessors, Compound Vector Processing, SIMD Computer Organizations (Upto 8.4), Scalable, Multithreaded, and Dataflow Architectures, Latency-Hiding Techniques, Principles of Multithreading, Fine-Grain Multicomputers, Scalable and Multithreaded Architectures, Dataflow and Hybrid Architectures.

Module 5

For complete syllabus and results, class timetable and more pls download iStudy. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Course Outcomes:

The students should be able to:

  • Understand the concepts of parallel computing and hardware technologies
  • Illustrate and contrast the parallel architectures
  • Recall parallel programming concepts
  • Question paper pattern:

  • The question paper will have ten questions.
  • There will be 2 questions from each module.
  • Each question will have questions covering all the topics under a module.
  • The students will have to answer 5 full questions, selecting one full question from each module.

Text Books:

  1. Kai Hwang and Naresh Jotwani, Advanced Computer Architecture (SIE): Parallelism, Scalability, Programmability, McGraw Hill Education 3/e. 2015

Reference Books:

  1. John L. Hennessy and David A. Patterson, Computer Architecture: A quantitative approach, 5th edition, Morgan Kaufmann Elseveir, 2013

For detail syllabus of all other subjects of BE Cse, 2017 scheme do visit Cse 7th Sem syllabus for 2017 scheme.

Dont forget to download iStudy for latest syllabus and results, class timetable and more.

Leave a Reply

Your email address will not be published. Required fields are marked *

*