Nanoelectronics detailed Syllabus for Nano Technology (Nano), 2018 scheme has been taken from the VTUs official website and presented for the VTU students. For Course Code, Subject Names, Teaching Department, Paper Setting Board, Theory Lectures, Tutorial, Practical/Drawing, Duration in Hours, CIE Marks, Total Marks, Credits and other information do visit full semester subjects post given below. The Syllabus PDF files can also be downloaded from the official website of the university.
For all other VTU Nano 7th Sem Syllabus for BE 2018 Scheme, do visit VTU Nano 7th Sem Syllabus for BE 2018 Scheme Subjects. The detailed Syllabus for nanoelectronics is as follows.
Course Learning Objectives:
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Module-1
QUANTUM ELECTRONICS AND SINGLE ELECTRON TRANSISTOR Introduction, Quantum Electronic Devices, Examples of quantum Electronics Device – Short Channel MOS transistor, Split Gate Transistor, Electronic spin Transistor, Quantum Cellular Automata and Quantum dot array. Single electron transistor: principles of SET, SET circuit design and Applications, molecular SETs, and molecular electronics
Module-2 CNT AND NANOELECTRONIC DEVICES
Carbon Nanotube: Introduction, properties, characterization and application of carbon nano tube. Introduction to Nano devices: Graphene transistors, Nanowire FET, quantum Dot devices, Quantum Dot FET, Organic transistors, CNTFET, FinFETs.
Module-3
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Module-4
NANO ELECTRONICS WITH TUNNELING DEVICES Tunnelling Diode, Resonant Tunnelling Diode (RTD), Three Terminal Resonant Tunnelling devices, Technology of RTD, Digital Circuit Based On RTDs – Memory Application, Basic Logic Circuits, Dynamic Logic Circuits and Digital circuits Based on the RTBT.
Module-5
TUNNEL JUNCTIONS Tunnel junctions and applications of tunnelling, tunnelling through potential barrier, potential energy profiles, applications of tunnelling, field emission, gate oxide tunnelling, hot electron effects in MOSFETs, coulomb blockade, blockade in nano capacitor, tunnel junctions, blockade in quantum dot circuits.
Course Outcomes:
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Question Paper Pattern:
- The question paper will have ten full questions carrying equal marks. Each full question consisting of 16 marks.
- There will be two full questions (with a maximum of four sub questions) from each module.
- Each full question will have sub question covering all the topics under a module.
Text Books:
- Nanoelectronic Circuit Design Niraj K. Jha, Deming Chen Springer First Edition, 2010
- Nano-Electronics and Quantum Computation Shareefraza J. Ukkund LAP-Lambert Academic Publishing, Mauritius. ISBN: 978-613-9-81812-9 First Edition, 2018
Reference Books:
For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
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For detail Syllabus of all other subjects of BE 7th Sem Nano Technology, visit (Nano) 7th Sem Syllabus Subjects.
For all (CBSE & Non-CBSC) BE results, visit VTU BE all semester results direct links.