2nd Sem, Sound Recording Diploma

15SR25P: Digital Electronic Lab Sound Recording 2nd Sem Syllabus for Diploma DTE Karnataka C15 Scheme

Digital Electronic Lab detail DTE Kar Diploma syllabus for Sound Recording Engineering (SR), C15 scheme is extracted from DTE Karnataka official website and presented for diploma students. The course code (15SR25P), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below. The syllabus PDFs can be downloaded from official website.

For all other sound recording 2nd sem syllabus for diploma c15 scheme dte karnataka you can visit Sound Recording 2nd Sem Syllabus for Diploma C15 Scheme DTE Karnataka Subjects. The detail syllabus for digital electronic lab is as follows.

Pre-requisites:

Fundamentals of mathematics and Electronics

Course Objectives:

  1. Familiarization of integrated circuits
  2. Verification of basic gates and Boolean expressions
  3. Verification of Combinational and sequential circuits

Course Outcomes:

For complete syllabus and results, class timetable and more pls download iStudy Syllabus App. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Course Delivery:

The course will be delivered through lectures, Demonstration and practical

Graded exercises

  1. Familiarization of 7400 7402, 7404, 7408, 7432 and 7486 ICs
  2. Verification of truth tables of OR, AND, NOT, NOR, NAND, EX-OR and EX-NOR gates.
  3. Realisation of AND, OR, NOT, NOR and EX-OR gates using NAND gates.
  4. Realisation of AND, OR, NOT, NOR and EX-OR gates using NOR gates.
  5. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output.
    1. A+B
    2. ABC
    3. ABC+ABC+ABC+ ABC.
  6. Reduce
    1. ABC+ABC+ABC+ABC
    2. ABCD+ABCD+ABCD+ABCD+ABCD+ABCD and construct the circuit and show the output.
  7. Verification of De Morgan’s Theorems.
  8. Construction and testing of a half adder using minimum logic gates.
  9. Construction and testing of full adder using minimum logic gates.
  10. Construction and testing of half subtractor.
  11. Construction and testing of full subtractor
  12. Develop Gray-to-binary code converter using IC 7486 and verify the output.
  13. Verify the truth table of 2-bit magnitude comparator using IC 7485.
  14. Construction and testing of SR flip flops using gates.
  15. Construction and testing of JK flip flop using gates and verifying output using IC 7476
  16. Construction and testing of D flip flop

Resource requirements for Digital Electronics Lab

For complete syllabus and results, class timetable and more pls download iStudy Syllabus App. Its a light weight, easy to use, no images, no pdfs platform to make students life easier.

Scheme of Valuation for SEE

  1. Writing Circuit diagram and Procedure 10
  2. Conduction 20
  3. Results 10
  4. Viva-voce 10

Model Question Paper:

Question Paper will have one question on Graded exercises

  1. Verification of truth tables of OR, AND, NOT, NOR, NAND, EX-OR and EX-NOR gates.
  2. Realisation of AND, OR, NOT, NOR and EX-OR gates using NAND gates.
  3. Realisation of AND, OR, NOT, NOR and EX-OR gates using NOR gates.
  4. Verification of Boolean expression (A+B)C = (AB)+C
  5. Verification of De Morgan’s Theorems.
  6. Construction and testing of a half adder using minimum logic gates.
  7. Construction and testing of full adder using minimum logic gates.
  8. Construction and testing of half and full subtractor.
  9. Verification of Logic gates using K-map.
  10. Construction and testing of SR flip flops using gates.
  11. Construction and testing of JK flip flop using gates and verifying output using IC 7476
  12. Construction and testing of D flip flop
  13. Solve the given Boolean equations using Boolean laws and deduce the truth table and
  14. circuit for the reduced equation and show the output.

    1. A+B
    2. ABC
    3. ABC+ABC+ABC+ABC.
  15. Reduce
    1. ABC+ABC+ABC+ABC
    2. ABCD+ABCD+ABCD+ABCD+ABCD+ABCD and construct the circuit and show the output.
  16. Develop Gray-to-binary code converter using IC 7486 and verify the output.
  17. Verify the truth table of 2-bit magnitude comparator using IC 7485

For detail syllabus of all other subjects of BE Sound Recording, C15 scheme do visit Sound Recording 2nd Sem syllabus for C15 scheme.

Dont forget to download iStudy Syllabus App for latest syllabus and results, class timetable and more.

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