15EC23P: Digital Electronics Lab-I Electronics 2nd Sem Syllabus for Diploma DTE Karnataka C15 Scheme

Digital Electronics Lab-I detail DTE Kar Diploma syllabus for Electronics And Communication Engineering (EC), C15 scheme is extracted from DTE Karnataka official website and presented for diploma students. The course code (15EC23P), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below. The syllabus PDFs can be downloaded from official website.

For all other electronics 2nd sem syllabus for diploma c15 scheme dte karnataka you can visit Electronics 2nd Sem Syllabus for Diploma C15 Scheme DTE Karnataka Subjects. The detail syllabus for digital electronics lab-i is as follows.

Pre-requisites:

Knowledge of basic electrical and electronics engineering in Semester-I.

Course Objectives:

Learn and understand the basics of digital electronics, Boolean algebra, and able to design the simple logic circuits and test/verify the functionality of the logic circuits.

Course Outcomes:

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UNIT -I: Tutorial and Practice Duration: 63Hr

1. Discuss the concept of digital electronics.
2. Binary systems and logic levels, TTL digital ICs, digital IC signal levels and IC numbering.
3. Identify the different parts of the digital trainer kit, precautions to be followed in handling ICs, learn to identify the pins, fix the ICs and measure the voltage levels on the kit. 6
2. Explain need of logic gates, logic function, truth table, pin diagram, identify the logic gates using standard and IEEE/ANSI symbols for the NOT, 2-input OR, AND gates and observe the output. 3
3. Explain logic function, truth table, pin diagram, identify the logic gates using standard and IEEE/ANSI symbols for the NOR, NAND and EX-OR gates and observe the output. 3
4. State De Morgan’s theorems and construct the simple circuits to observe their validity. 3
5. State and describe the Boolean identities and laws. Show the verification of commutative, associative and distributive Boolean laws using suitable logic gates. 3
6. Discuss the universality of NAND gates. Construct NOT, OR, AND, NOR, EX-OR and EX-NOR gates using NAND gates and show the output. 3
7. Discuss the universality of NOR gates. Construct NOT, OR, AND, NOR, EX-OR and EX-NOR gates using NOR gates and show the output. 3
8. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output.
1. A + B~
2. ABC
3. ABC + ABC+ABC+ ABC . 3
9. Explain K-map for three and four variables, identification of pairs, quads and octets and solving sum-of-products equations. Reduce
1. A BC + ABC +ABC +ABC
2. ABCD + ABCD + ABCD + ABCD + A BCD + A BCD

and construct the circuit and show the output

10. Discuss binary number system, convert decimal to binary number system and vice versa, give examples to add binary numbers. Construct a truth table to add two bits showing the sum and carry results and implement the resulting halfadder using suitable logic gates. 3
11. Construct a truth table to add two bits along with a possible carry out showing the sum and carry results. Write sum-of-products equation for the output, reduce using K-map and implement the resulting full-adder using suitable logic gates. 3
12. Discuss binary subtraction. Write the truth-table for full-subtractor. Write sum-of- products equation for the output, reduce using K-map and implement using suitable logic gates. 3
13. Understand ones and two’s complement arithmetic of binary numbers and their role in binary arithmetics with examples. Construct the circuit to implement the subtraction and addition of two 4-bit data using IC 7483 using two’s complement method (use IC 7483 and IC 7486) and show the output. 3
14. Discuss Gray and BCD codes. Develop Binary-to-Gray code converter using IC 7486 and verify the output. 3
15. Develop Gray-to-binary code converter using IC 7486 and verify the output. 3
16. Define a parity bit. Discuss even parity and odd parity bit and its importance in communication. Develop a parity generator and checker using IC 7486. 3
17. Discuss the importance of comparator. Verify the truth table of 2-bit magnitude comparator using IC 7485. 3
18. Discuss the significance of enable/disable circuits. Demonstrate an enable/disable circuit using AND/OR, NAND/NOR gates. 3

UNIT – II: Project Activities [CIE- 05 Marks] Duration: 15 Hr

1. Collect the information about any three digital systems and highlight the difference between analog and digital systems. 3
2. Write a chart to represent decimal numbers from 0 to 50 in binary, octal and hexadecimal number systems. 3
3. Collect the information on signed and unsigned binary numbers. Prepare a chart to represent the decimal numbers from -20 to +20 in 8-bit format in signed and singned-magnitude representation. 3
4. Perform binary multiplication and division with examples. 3
5. List the features of BCD, ASCII excess-3 codes with examples. 3
6. Open-ended activity like
1. Simulate a realistic digital circuit containing at least six logic gates.
2. Collect the catalogues and specification sheets or a chart displaying various logic ICs (At least 10)
3. Record the best practices used in the disposal of e-waste and precautions in the operation of digital systems.
4. Any other such activities that can contribute for the student’s knowledge in respect of this course.

Execution Mode

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Reference Books:

1. Digital Principles and Applications, Donald P Leach, Albert Paul Malvino,Goutam Saha,McGraw-Hill publications.
2. Digital Systems Principles and Applications, Ronald J.Tocci,Neal S Widmer,Gregory L.Moss. Pearson Publication.
3. http://www.vlab.co.in/
4. http://www.asic-world.com/
5. http://www.vlab.co.in/
6. http://electrical4u.com/
7. http://www.electronics-tutorials

Course Delivery:

The course will be delivered through two-hour tutorials and four-hour hands-on practice per week

Scheme of Evaluation for Semester End Exam

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Note:

1. Candidate shall submit Lab record for the examination.
2. Student should be allowed to conduct directly even if she/he is unable to write the procedure.

Laboratory Resource Requirements

Hardware Requirement:For a batch of 20 students

1. Digital trainers 15
2. Dual trace oscilloscope. 05
3. Digital multimeters 05
4. ICS-7400,7402,7404,7408,7432,7486,7483,7485,7427 10 each
5. Patch cards( different lengths. 250
6. Digital IC Tester 02
7. Logic Pulser 02

Model Questions for Practice and Semester End Examination

Note: The questions in the question bank are indicative but not exhaustive.

1. Write Truth table and show the outputs of 2-input OR, AND, NOR gates using suitable TTL ICs.
2. Write the truth table and show the outputs of NOT gate, 2-input NAND, EX-OR gates using suitable TTL ICs.
3. Construct the circuit to verify De-Morgan’s theorems and show the results.
4. Construct the circuit to show that NAND gate is equivalent to bubbled OR- gate.
5. Construct the circuit to show that NOR gate is equivalent to bubbled AND- gate.
6. Construct the circuit to verify the equation A + B = AB
7. Construct the circuit to demonstrate commutative, associative Boolean laws using suitable logic gates.
8. Construct the circuit to demonstrate commutative and distributive Boolean laws using suitable logic gates.
9. Construct the circuit to demonstrate associative and distributive Boolean laws using suitable logic gates.
10. Construct NOT, OR, AND gates using NAND gates and show the verification of the truth table.
11. Construct NOT, AND, NOR gates using NAND gates and show the verification of the truth table.
12. Construct NOT and EX-OR gates using NAND gates and show the verification of the truth table.
13. Construct AND and EX-NOR gates using NAND gates and show the verification of the truth table.
14. Construct NOT, OR, AND gates using NOR gates and show the verification of the truth table.
15. Construct NOT, AND, NAND gates using NOR gates and show the verification of the truth table.
16. Construct NOT and EX-OR gates using NOR gates and show the verification of the truth table.
17. Construct OR and EX-NOR gates using NOR gates and show the verification of the truth table.
18. Construct using suitable gates to show the verification of AB+AB =A
19. Construct using suitable gates to show the verification of A+AB=A+B
20. Construct using suitable gates to show the verification of A+A = 1
21. Construct using suitable gates to show the verification of A.A =0
22. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output.
1. A + B
2. ABC
23. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output ofABC + ABC+ABC+ ABC
24. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output ofABC + ABC+ABC
25. Solve the given Boolean equations using Boolean laws and deduce the truth table and circuit for the reduced equation and show the output ofABC + ABC+ ABC
26. Reduce A BC + ABC+ABC+ ABC using K-Map and construct the circuit and show the output.
27. Reduceusing K-map ABCD +ABCD + ABCD + ABCD + ABCD + ABCD + A BCD and construct the circuit and show the output.
28. Reduce using K-map ABCD + ABCD + ABCD + ABCD + ABCD+ ABCD and construct the circuit and show the output.
29. Reduce F(A,B,C)=£m(0,1,5) using K-map and construct the circuit for the reduced equation and show the output.
30. Reduce F(A,B,C)=£m(0,2,4,6) using K-map and construct the circuit for the reduced equation and show the output.
31. Reduce F(A,B,C,D)=£m(0,1,4,5,9,13) using K-map and construct the circuit for the reduced equation and show the output.
32. Reduce F(A,B,C,D)=£m(0,1,4,5,9,13) + d(3,7,11,15) using K-map and construct the circuit for the reduced equation and show the output.
33. Describe half adder circuits and write truth table, sum of products equation and implement using suitable logic gates.
34. Describe full adder circuits and write truth table, sum of products equation, reduce using K-map and implement using suitable logic gates.
35. Construct an adder circuit to add two bits with a possible carry from a lower column and write the truth table, sum of products equation, reduce using K-map and implement using suitable logic gates.
36. Construct a truth table to subtract two bits along with a possible borrow showing the difference and borrow results, write sum of products equation, reduce using K-map and implement the resulting full subtractor using suitable logic gates.
37. Illustrate the operation of IC 7483 for four bit binary addition.
38. Connect the circuit to implement the subtraction of two 4-bit data using IC 7483 using two’s complement method.(use IC 7483 and IC 7486.) and show the output.
39. Develop Binary to Gray code converter using IC 7486 and verify the output.
40. Develop Gray to binary code converter using IC 7486 and verify the output.
41. Develop a 4-bit parity generator and checker using IC 7486.
42. Verify the truth table of 2-bit magnitude comparator using IC 7485.
43. Demonstrate an Enable/disable circuit using AND gates.
44. Demonstrate an Enable/disable circuit using OR gates.
45. Demonstrate an Enable/disable circuit using NAND gates.
46. Demonstrate an Enable/disable circuit using NOR gates.

For detail syllabus of all other subjects of BE Electronics, C15 scheme do visit Electronics 2nd Sem syllabus for C15 scheme.

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