15CS32T: Computer Organisation Computers 3rd Sem Syllabus for Diploma DTE Karnataka C15 Scheme

Computer Organisation detail DTE Kar Diploma syllabus for Computer Science And Engineering (CS), C15 scheme is extracted from DTE Karnataka official website and presented for diploma students. The course code (15CS32T), and for exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below. The syllabus PDFs can be downloaded from official website.

For all other computers 3rd sem syllabus for diploma c15 scheme dte karnataka you can visit Computers 3rd Sem Syllabus for Diploma C15 Scheme DTE Karnataka Subjects. The detail syllabus for computer organisation is as follows.

Pre-requisites:

Fundamentals of Digital electronics and basics of Computers and its peripherals.

Course Objectives:

Understand the organization of a computer with its various processing units, memory and peripherals.

Course Outcomes:

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UNIT I: Basic Structures of Computers 02 Hrs

Functional Units, Input Unit, Memory Unit, Arithmetic and Logic Unit, Output Unit, Control Unit, Basic Operational Concepts, Bus Structures.

UNIT II: Machine Instructions & Programmes 10 Hrs

Memory Locations and Addresses , Byte Addressability, Big Endian and Little Endian Assignments, Word Alignment, Accessing numbers, characters and character strings, Memory Operations, Instruction and Instruction sequencing, Register Transfer notation, Assembly Language notation, Basic instruction types, Instruction execution and straight line sequencing, Branching, Condition codes, Addressing modes, Implementation of variables and constants, Indirection and pointers, Indexing and arrays, Relative addressing, Additional modes, Assembly Language, Assembler directives, Assembly and execution of programs, Basic Input- Output Operations.

UNIT III: Basic Processing Unit 08 Hrs

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UNIT IV: Input Output Organization 10 Hrs

Accessing I/O Devices, Interrupts, Interrupt Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, Controlling Device requests, Exceptions, Direct Memory Access, Bus arbitration, Buses, Synchronous bus, Asynchronous bus, Interface Circuits, Parallel port and Serial port (Basic concept only), Standard I/O Interfaces (Basic concepts only), Peripheral Component Interconnect (PCI) Bus , SCSI Bus( Basic concepts only), Universal Serial Bus (USB) ( Basic concepts only)

UNIT V: The Memory System 14 Hrs

Some Basic Concepts, Semiconductor RAM Memories, Internal Organization of memory chips, Static Memories, Asynchronous DRAMs, Synchronous DRAMs, Structure of larger memories, Memory system consideration, Rambus memory, Read-Only Memories- ROM, PROM, EPROM, EEPROM, Flash Memory, Speed, Size and Cost, Cache Memories..

UNIT VI: Processors and Pipelining 08 Hrs

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Text Books:

1. Computer Organization, Carl Hamacher, zvonko Vranesic and Safwat Zaky, McGraw Hill, 5th edition ( Chapters 1, 2, 4, 5, 7, for UNIT I to UNIT V)
2. Advanced Computer Architecture (A practical approach ), Rajiv Chopra, S. Chand, Revised edition, reprint 2014, ISBN8121930774 – for UNIT VI page no 133 to 138 , 143 to 145 , 192 to 194 , 218 to 219 , 221 to 223

Reference Books:

1. http://elearning.vtu.ac.in/06CS46.html
2. http://nptel.ac.in/courses/Webcourse-contents/IIT-%20Guwahati/comp_org_arc/web/
3. William Stallings, “Computer Organization and Architecture: Designing for Performance”, Eighth Edition, Pearson.
4. Computer architecture and organization , 4th edition , P Chakraborty , JAICO publishers
5. http://www.srmuniv.ac.in/downloads/computer_architecture.pdf
6. http://www.dauniv.ac.in/downloads/CArch_PPTs/CompArchCh06L01PipeLine.pdf

Suggested List of Student Activities:

Note: The following activities or similar activities for assessing CIE (IA) for 5 marks (Any one)

Student activity like mini-project, surveys, quizzes, etc. should be done in group of 3-5 students.

1. Each group should do any one of the following type activity or any other similar activity related to the course and before conduction, get it approved from concerned course coordinator and programme co-ordinator
2. Each group should conduct different activity and no repeating should occur.

1. Conduct a survey on various types of processors available with their features and submit a report.
2. List out the features of 8086 microprocessor and 8051 micro controller with respect to architecture and working.
3. Submit a report on hardware and software interrupts.
4. A Case study on Moore’s Law about the processors and submit a report.
5. Conduct a survey on types of memories and also about the cost and speed of various memories with comparison.

Course Delivery:

The course will be delivered through lectures and Power point presentations/ Video

Model Question Paper:

(CIE)

1. Describe the role of MAR, MDR , PC and IR. (5)
2. Explain the role of buffer registers (5)
3. Describe the Big-endian and Little-endian addressability (5)
4. Explain straight line sequencing (5) OR Describe register and absolute addressing mode.

Model Question Paper:

PART-A

Answer any SIX questions. Each carries 5 marks.

1. Explain the basic functional unit of a Computer.
2. Describe register and absolute addressing mode.
3. Write a note on register transfers.
4. Explain the concept of micro programmed control .
5. Explain how to enable and disable an interrupt.
6. Explain the use of PCI bus in the computer system.
7. Explain the Double-data-rate SDRAM concept.
8. Explain the concept of flash drives.
9. Compare super scalar verses VLIW.

PART-B

Answer any SEVEN full questions each carries 10 marks. 10X7=70 Marks

1. Explain with examples one-address, two-address and three-address instruction types.
2. Describe program-controlled I/O operation.
3. Illustrate with diagram arithmetic and logic operation.
4. Describe the working of DMA.
5. Explain the serial port interface.
6. Explain the operation asynchronous DRAM.
7. Describe the features of PROM, EPROM and EEPROM.
8. Illustrate with diagram memory hierarchy with respect to speed, size and cost.
9. Explain CISC scalar and RISC scalar processor.
10. Describe Arithmetic, Instruction and processor pipelining.

For detail syllabus of all other subjects of BE Computers, C15 scheme do visit Computers 3rd Sem syllabus for C15 scheme.

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