{"id":18524,"date":"2021-11-24T11:54:59","date_gmt":"2021-11-24T11:54:59","guid":{"rendered":"https:\/\/www.inspirenignite.com\/up\/departmental-elective-4-kec071-vlsi-design-ie-7th-sem-syllabus-for-aktu-b-tech-2021-22-scheme\/"},"modified":"2021-11-24T11:54:59","modified_gmt":"2021-11-24T11:54:59","slug":"departmental-elective-4-kec071-vlsi-design-ie-7th-sem-syllabus-for-aktu-b-tech-2021-22-scheme","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/up\/departmental-elective-4-kec071-vlsi-design-ie-7th-sem-syllabus-for-aktu-b-tech-2021-22-scheme\/","title":{"rendered":"(Departmental Elective-4) KEC071: VLSI Design IE 7th Sem Syllabus for AKTU B.Tech 2021-22 Scheme"},"content":{"rendered":"<p align=\"justify\">VLSI Design detail syllabus for Instrumentation Engineering (IE), 2021-22 scheme is taken from <a class=\"rank-math-link\" href=\"https:\/\/aktu.ac.in\/\" style=\"color: inherit\" rel=\"nofollow noopener\" target=\"_blank\">AKTUs<\/a> official website and presented for the AKTU B.Tech students. For the course code (KEC071), exam duration, teaching hr\/week, practical hr\/week, total marks, internal marks, theory marks, duration, credits, and other details do visit complete semester subjects post given below.<\/p>\n<p>For the IE 7th Sem Syllabus for AKTU B.Tech 2021-22 Scheme you can visit <a href=\"..\/ie-7th-sem-syllabus-for-aktu-b-tech-2021-22-scheme\">IE 7th Sem 2021-22 Scheme<\/a>. For the Departmental Elective-4 scheme of IE 7th Sem 2021-22 regulation do refer to <a href=\"..\/departmental-elective-4-ie-7th-sem-syllabus-for-aktu-b-tech-2021-22-scheme\">Departmental Elective-4 IE 7th Sem scheme<\/a>. The detail syllabus for vlsi design is as follows.<\/p>\n<p>  <title>VLSI Design<\/title><\/p>\n<h4>Unit I<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" rel=\"nofollow noopener\" target=\"_blank\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students&#8217;s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&amp;pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" rel=\"nofollow noopener\" target=\"_blank\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>  <\/p>\n<h4>Unit II<\/h4>\n<p>  Interconnect Parameters: Resistance, Inductance, and Capacitance, skin effect and its influence , lumped RC Model, the distributed RC Model, transient Response, RC delay model, Linear Delay Model, Logical Effort of Paths, Scaling.<\/p>\n<h4>Unit III<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" rel=\"nofollow noopener\" target=\"_blank\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students&#8217;s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&amp;pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" rel=\"nofollow noopener\" target=\"_blank\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>  <\/p>\n<h4>Unit IV<\/h4>\n<p>  Semiconductor Memories: Dynamic Random Access Memories (DRAM), Static RAM, non-volatile memories, flash memories, Pipeline Architecture. Low &#8211; Power CMOS Logic Circuits: Introduction, Overview of Power Consumption, Low &#8211; Power Design through voltage scaling,<\/p>\n<h4>Unit V<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" rel=\"nofollow noopener\" target=\"_blank\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students&#8217;s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&amp;pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" rel=\"nofollow noopener\" target=\"_blank\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>  <\/p>\n<h4>Text Books:<\/h4>\n<ol>\n<li>Sung-Mo Kang &amp; Yosuf Leblebici, &#8216;CMOS Digital Integrated Circuits: Analysis &amp; Design&#8217;,Mcgraw Hill, 4th Edition.<\/li>\n<li>Neil H.E.Weste, David Money Harris, &#8216;CMOS VLSI Design &#8211; A circuits and Systems Perspective&#8217; Pearson, 4th Edition.<\/li>\n<li>D. A. Pucknell and K. Eshraghian, &#8216;Basic VLSI Design: Systems and Circuits&#8217;, PHI, 3rd Ed., 1994.<\/li>\n<\/ol>\n<h4>Reference Books:<\/h4>\n<ol>\n<li>R. J. Baker, H. W. Li, and D. E. Boyce, &#8220;CMOS circuit design, layout, and simulation&#8221;, Wiley-IEEE Press, 2007.<\/li>\n<li>M. Abramovici, M.A. Breuer and A.D. Friedman, &#8220;Digital Systems and Testable Design&#8221;, Jaico Publishing House.<\/li>\n<\/ol>\n<h4>Course Outcomes:<\/h4>\n<p>  At the end of this course students will demonstrate the ability to:<\/p>\n<ol>\n<li>Express the concept of VLSI design and CMOS circuits and delay study.<\/li>\n<li>Analyze mathematical methods and circuit analysis models in analysis of CMOS digital electronics circuits.<\/li>\n<li>Design and analyze various combinational &amp; sequential circuits based on CMOS technology.<\/li>\n<li>Examine power logic circuits and different semiconductor memories used in present day technology.<\/li>\n<li>Interpret faults in digital circuits, Fault Models and various Testing Methodologies.<\/li>\n<\/ol>\n<p align=\"justify\">For the syllabus of all the subjects of B.Tech IE 7th Sem, 2021-22 scheme do visit <a class=\"rank-math-link\" href=\"..\/category\/ie+7th-sem\">IE 7th Sem syllabus subjects<\/a>.<\/p>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" rel=\"nofollow noopener\" target=\"_blank\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students&#8217;s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&amp;pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" rel=\"nofollow noopener\" target=\"_blank\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>VLSI Design detail syllabus for Instrumentation Engineering (IE), 2021-22 scheme is taken from AKTUs official website and presented for the AKTU B.Tech students. For the course code (KEC071), exam duration, [&hellip;]<\/p>\n","protected":false},"author":2300,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[58],"tags":[],"class_list":["post-18524","post","type-post","status-publish","format-standard","hentry","category-ie"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/posts\/18524","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/users\/2300"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/comments?post=18524"}],"version-history":[{"count":0,"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/posts\/18524\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/media?parent=18524"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/categories?post=18524"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/up\/wp-json\/wp\/v2\/tags?post=18524"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}