Computer Architecture and Hardware Maintenance detail BTEUP syllabus for Information Technology, effective from 2019-2020, is collected from BTEUP 2017 Syllabus official website and presented for diploma students. PDF download is possible from official site but you can download the istudy mobile app for syllabus on mobile. The course details such as exam duration, Teaching Hr/week, Practical Hr/week, Total Marks, internal marks, theory marks, duration and credits do visit complete sem subjects post given below. The syllabus PDFs can be downloaded from official website.
For all other bteup syllabus 3rd sem information tech 2019-2020 you can visit BTEUP Syllabus 3rd Sem Information Tech 2019-2020 Subjects. The detail syllabus for computer architecture and hardware maintenance is as follows.
Rationale:
The subject provides the students with the knowledge of detailed organization of currently available personal computers in order to understand their functioning .The students will also get familiar with Architecture of multi processor systems.
Learning Outcomes:
After undergoing the subject, students will be able to:
- use CPU, register and stack.
- compare micro programmed and hardwired control.
- compare RISC and CISC architecture.
- understand memory hierarchy and memory types.
- explain the function of BIOS.
- illustrate multi processor systems.
- set-up, diagnose problems troubleshoot & Maintained the computer components.
1. Hardware Organisation of computer system (10 periods)
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2. Memory organisation (10 periods)
- Memory Hierarchy
- RAM and ROM chips, Memory address map, Memory connections to CPU.
- Auxillarymemory: Magnetic disks and magnetic tapes.
- Associative memory
- Cache memory
- Virtual memory
- Memory management hardware
- Read and Write operation
3. Arithmetic Operations (08 periods)
- Introduction, Addition, Subtraction, Multiplication and Division algorithm.
4. I/O Organization (10 periods)
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5. 8085 Microprocessor: Introduction, Architecture, Pin diagram, Comparison with 8086. (6 periods)
6. Architecture of multi processor systems (12 periods)
- Forms of parallel processing
- Parallel processing and pipelines, basic characteristics of multiprocessor
- General purpose multiprocessors
- Interconnection networks: time shared common bus, multi port memory, cross bar switch, multi stage switching networks and hyper cube structures.
List of Experiments:
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Instructional Strategy:
Since the subject is theoretical one, the practical aspects should be taught along with the theory instruction. The students should be given quiz tests and asked to give seminars on small topics. There is sufficient time in the subject and the students can be taken to laboratory for demonstration.
Means of Assessment:
- Assignments and quiz/class tests, mid-term and end-term written tests
- Viva-voce
Text Books:
- Computer Architecture and Organisation by Moris Mano
- Computer Architecture by J.P.Hayes
- Structured Computer Organisation by Tanenbaum Andrew S, PHI
- e-books/e-tools/relevant software to be used as recommended by AICTE/NITTTR, Chandigarh.
Reference Books:
http://swayam.gov.in
For detail syllabus of all other subjects of BE Information Tech, effective from 2019-2020 do visit Information Tech 3rd Sem BTEUP syllabus for 2019-2020.
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