Advance Digital Design Using Verilog ECE 6th Sem Syllabus for AKTU B.Tech 2019-20 Scheme (Departmental Elective-II)

Advance Digital Design Using Verilog detail syllabus for Electronics & Communication Engineering (ECE), 2019-20 scheme is taken from AKTU official website and presented for AKTU students. The course code (REC064), and for exam duration, Teaching Hr/Week, Practical Hr/Week, Total Marks, internal marks, theory marks, and credits do visit complete sem subjects post given below.

For all other ece 6th sem syllabus for b.tech 2019-20 scheme aktu you can visit ECE 6th Sem syllabus for B.Tech 2019-20 Scheme AKTU Subjects. For all other Departmental Elective-II subjects do refer to Departmental Elective-II. The detail syllabus for advance digital design using verilog is as follows.

Unit I

For the complete syllabus, results, class timetable and more kindly download iStudy. It’s a lightweight, easy to use, no images, no pdfs platform to make student’s life easier.

Unit II

Combinational Circuit Design, Multiplexers, Decoders, Encoders, Code Comparators, Adders, Subtractors, Multipliers, Introduction to Verilog, Behavioral and Structural specification of logic circuits, Boolean function implementation using Verilog, Timing Analysis, Hazard Detection and Elimination

Unit III

Synchronous Sequential Circuits Design, Mapping Algorithm, Synchronous StateMachines, ASM Charts, Asynchronous Sequential Circuit Design, Races, Multi-levelminimization and optimization.

Unit IV

For the complete syllabus, results, class timetable and more kindly download iStudy. It’s a lightweight, easy to use, no images, no pdfs platform to make student’s life easier.

Unit V

Study of programmable logic families, PLD, CPLD, FPGA, ASIC, PLA, Architectures,Design of Combinational and sequential circuits using CPLD and FPGA, Design Examples.

Reference Books:

1. John Williams, Digital VLSI Design with Verilog, Springer Publication.
2. Eugene Fabricius, Modern Digital Design and Switching Theory, CRC Press.
3. Samuel C. Lee, Digital Circuit and Logic Design, PHI India Ltd.
4. Alexander Miczo, Digital Logic Testing and Simulation,WileyInterscience.
5. Richard F. Tinder, Engineering Digital Design, Academic Press.
6. Parag K. Lala, Digital system Design Using PLDs, PHI India Ltd.
7. Stephen Brown and ZvonkoVranesiv, Fundamental of Digital Logic with Verilog Design, Tata McGraw Hill.

For detail syllabus of all other subjects of B.Tech Ece, 2019-20 regulation do visit Ece 6th Sem syllabus for 2019-20 Regulation.

Don’t forget to download iStudy for the latest syllabus, results, class timetable and more.