7EC4-21: VLSI Design Lab Syllabus for ECE 7th Sem 2020-21 Regulation RTU

VLSI Design Lab detailed syllabus for Electronics & Communication Engineering (ECE) for 2020-21 regulation curriculum has been taken from the Rajasthan Technical University official website and presented for the electronics & communication engineering students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.

For Electronics & Communication Engineering 7th Sem scheme and its subjects, do visit ECE 7th Sem 2020-21 regulation scheme. The detailed syllabus of vlsi design lab is as follows.

Part-A

Step 1 Write the VHDL/Verilog code using VHDL software for following experiment and simulate them. Step 2. Burn the Written code in Xilling Board and test the output with real input signal

1. Design and simulate all the logic gates with 2 inputs using VHDL/Verilog.
2. Design and simulate 2-to-4 decoder,3-to-8 encoder and 8X1 multiplexer using VHDL/Verilog.
3. Design and simulate half adder and full adder using VHDL (data flow method)/Verilog.
4. Design and simulate D, T and J-K flip flop using VHDL/Verilog.
5. Design a 4bit binary Asynchronous and synchronous counter. Obtain its number of gates, area, and speed and power dissipation.
6. Design a 4- bit Serial in-serial out shift register. Obtain its number of gates, area, and speed and power dissipation.

Part-B

Step-1 Design and simulate following experiment using ECAD software Viz. Mentor graphics, Orcade Pspice, Cadence etc. Step-2 Draw the layout (without any DRC error)of the schematic obtain in step 1 and obtain post layout simulation using appropriate ECAD software.

1. Design and simulate all the logic gates (NOT, NAND and NOR) with 2 inputs in CMOS Technology.
2. Design and simulate Y = AB (C+D), Y = A+B(C+D) and 4X1 multiplexer using CMOS Technology.
3. Design and simulate half adder and full adder using CMOS Technology.
4. Design and simulate SR flip flop using CMOS Technology.
5. Design and Simulate any DRAM cell.

For detailed syllabus of all other subjects of Electronics & Communication Engineering, 2020-21 regulation curriculum do visit ECE 7th Sem subject syllabuses for 2020-21 regulation.

For all Electronics & Communication Engineering results, visit Rajasthan Technical University electronics & communication engineering all semester results direct link.