Switching Theory and Logic Design Lab detailed syllabus scheme for B.Tech Information Technology (IT), 2017 onwards has been taken from the DBATU official website and presented for the Bachelor of Technology students. For Subject Code, Course Title, Lecutres, Tutorials, Practice, Credits, and other information, do visit full semester subjects post given below.
For all other DBATU Syllabus for Information Technology 3rd Sem 2017, do visit IT 3rd Sem 2017 Onwards Scheme. The detailed syllabus scheme for switching theory and logic design lab is as follows.
Switching Theory and Logic Design Lab Syllabus for Information Technology (IT) 2nd Year 3rd Sem 2017 DBATU
Lab Experiments Objective:
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Lab Experiments List:
- Implementation of Boolean functions using Gates.
- Implementation of following code conversions:
- Binary to gray
- Gray to binary
- Excess -3 to BCD
- BCD to Excess -3.
- Implementation of half adder, full adder.
- Implementation of half subtractor, full subtractor.
- Implementation of K-map examples.
- Implementation of Quine-McClusky examples.
- Implementation of :
- 3 bit odd Parity Checker
- 4 bit odd Parity Checker
- 3 bit even Parity Checker
- 4 bit even Parity Checker
- Implementation of Multiplexer and Demultiplexer.
- Implementation of BCD adder using 4 bit adder IC.
- Study of flip flops:
- RS flip-flop
- D flip-flop
- T flip-flop
- J-K flip-flop
- Implementation of following counters:
- Synchronous counter
- Asynchronous counter
- up / down counter
- Ring counter
- Johnson Counter
For detail syllabus of all other subjects of Information Technology (IT) 3rd Sem 2017 regulation, visit IT 3rd Sem Subjects syllabus for 2017 regulation.