Digital Electronics Lab Practice detailed syllabus scheme for Instrumentation Engineering (IS), 2017 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.
For all other Mumbai University Instrumentation Engineering 3rd Sem Syllabus 2017 Pattern, do visit IS 3rd Sem 2017 Pattern Scheme. The detailed syllabus scheme for digital electronics lab practice is as follows.
Digital Electronics Lab Practice Syllabus for Instrumentation Engineering SE 3rd Sem 2017 Pattern Mumbai University
Course Objectives:
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Course Outcomes:
Students will be able to –
- Implement code converters.
- Verifying truth tables of all logic gates using NAND and NOR gates.
- Using gates for constructing half and full adder and subtractor and also realize with multiplexer.
- Understand the basics of types of flip-flops and design them to implement other flip-flops.
- Design and implement counters and shift registers.
- Learn how to convert BCD to seven segment and design finite state machine.
List of Laboratory Experiments:
- Implementation and conversion of gray/binary code. CO1
- Implementation of all gates using NAND/NOR. CO2
- Implementation of half/ full adder. CO3
- Implementation of half/ full Subtractor CO3
- Realise full adder using 2:1 Multiplexer CO3
- Realise full Subtractor using 2:1 Multiplexer CO3
- Implementation of various flip-flops CO4
- Design and implement RS flip flop into other flip flops CO4
- Design and implement JK flip flop into other flip flops CO4
- Design and implement modulo-n counter CO5
- Design and implement ring counter CO5
- Design and implement universal shift register CO5
- Implement BCD to seven segments CO6
- Design finite state machine for a digital lock CO6
Note:
- Any other experiments based on syllabus which will help students to understand topic/concept.
- It is advised to implement one or two practicals with VHDL.
Term Work: Term work shall consist of minimum eight experiments. The distribution of marks for term work shall be as follows: Laboratory work (Experiments) Laboratory work (programs/ journal) Marks Attendance : 10 Marks : 10 : 5 Marks The final certification and acceptance of term work ensures the satisfactory performance of laboratory work and minimum passing in the term work.
For detail syllabus of all other subjects of Instrumentation Engineering (IS) 3rd Sem 2017 regulation, visit IS 3rd Sem Subjects syllabus for 2017 regulation.