Digital Circuit Design Laboratory detailed syllabus scheme for Electronics Engineering (EL), 2016 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.
For all other Mumbai University Electronics Engineering 3rd Sem Syllabus 2016 Pattern, do visit EL 3rd Sem 2016 Pattern Scheme. The detailed syllabus scheme for digital circuit design laboratory is as follows.
Digital Circuit Design Laboratory Syllabus for Electronics Engineering SE 3rd Sem 2016 Pattern Mumbai University
Term Work:
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Suggested List of Experiments,
However Instructor is free to design his/her own experiments as per the guidelines Laboratory Experiments
- Verify different logic gates.
- Simplification of Boolean functions.
- Verify Universal gates NAND and NOR and design EXOR and EXNOR gates using Universal gates.
- Implement Half adder, Full adder, Half subtractor and Full subtractor circuits.
- Implement BCD adder using four bit binary adder IC-7483.
- Flip flops conversion JK to D, JK to T and D to TFF.
- Implement logic equations using Multiplexer.
- Design synchronous MOD N counter using IC-7490.
- Verify encoder and decoder operations.
- Implement digital circuits to perform binary to gray and gray to binary operations.
- Verify truth table of different types of flip flops.
- Verify different counter operations.
- Verify operations of shift registers.
- Implement parity checker circuit.
For detail syllabus of all other subjects of Electronics Engineering (EL) 3rd Sem 2016 regulation, visit EL 3rd Sem Subjects syllabus for 2016 regulation.