ELX303: Digital Circuit Design Syllabus for EL 3rd Sem 2016 Pattern Mumbai University

Digital Circuit Design detailed syllabus scheme for Electronics Engineering (EL), 2016 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.

For all other Mumbai University Electronics Engineering 3rd Sem Syllabus 2016 Pattern, do visit EL 3rd Sem 2016 Pattern Scheme. The detailed syllabus scheme for digital circuit design is as follows.

Digital Circuit Design Syllabus for Electronics Engineering SE 3rd Sem 2016 Pattern Mumbai University

Course Objectives:

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Course Outcomes:

1. Students will be able to perform various logical and arithmetic operations various number systems as well as conversion of one representation to another.
2. Students will be able to apply Boolean algebra for the implementation and minimization of logic functions.
3. Students will be analyze, design and implement combinational logic circuits.
4. Students will be able to differentiate between logic families TTL and CMOS.
5. Students will be able to analyze, design and implement sequential logic circuits.

1. Number Systems and Codes: 06

Review of Number System, Binary Code, Binary Coded Decimal, Octal Code, Hexadecimal Code and their conversions, Binary Arithmetic: One’s and two’s complements,Excess-3 Code, Gray Code, Weighted code, Parity Code: Hamming Code

2. Logic Gates and Boolean Algebra: 08

Digital logic gates, Realization using NAND, NOR gates, Boolean Algebra, De Morgans Theorem, SOP and POS representation, K Map up to four variables and Quine-McClusky method upto four variables

3. Combinational Logic Circuits and Hazards 12

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
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4. Logic Families: 06

Basics of standard TTL (Two input NAND gate operation), CMOS (Inverter, Two input NAND gate, Two input NOR gate), Interfacing of TTL to CMOS and CMOS to TTL, ECL, Working and characteristics of logic families

5. Sequential Logic Principles: 08

Latches and Flip flops: Difference between latches and flip flops, RS, JK, Master slave flip flops, T & D flip flops with various triggering methods, Conversion of flip flops, Applications of latches and flip flops in switch debouncing, bus holder circuits, Flip flops timing considerations and Metastability

6. Counters and Registers: 08

Asynchronous and Synchronous, Up/Down, Johnson Counter, MOD N, BCD counter using Decade counter, Ring counters, Shift registers, Universal Shift Register

Text Books:

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier.
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Reference Books:

1. A. Anand Kumar, Fundamentals of Digital Circuits, PHI, Fourth Edition, 2016.
2. Morris Mano / Michael D. Ciletti , Digital Design, Pearson Education, Fourth Edition, 2008.
3. Donald P. Leach / Albert Paul Malvino / Gautam Saha, Digital Principles and Applications, The McGraw Hill, Seventh Edition, 2011.
4. Thomas L. Floyd, Digital Fundamentals, Pearson Prentice Hall, Eleventh Global Edition, 2015.
5. Charles H. Roth, Fundamentals of Logic Design, Jaico Publishing House, First Edition, 2004.
6. Norman Balabanian/ Bradley Carlson, Digital Logic Design Principles, John Wiley & Sons, First Edition, 2011.

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both the tests will be considered as final IA marks.

End Semester Examination:

1. Question paper will comprise of 6 questions, each carrying 20 marks.
2. The students need to solve total 4 questions.
3. Question No. 1 will be compulsory and based on entire syllabus.
4. Remaining questions (Q2 to Q6) will be set from all modules.
5. Weightage of each module in question paper will be proportional to the number of respective lecture hours mentioned in the syllabus.

For detail syllabus of all other subjects of Electronics Engineering (EL) 3rd Sem 2016 regulation, visit EL 3rd Sem Subjects syllabus for 2016 regulation.