Digital System Design detailed syllabus scheme for Electronics & Telecommunication Engineering (ET), 2017 onwards has been taken from the DBATU official website and presented for the Bachelor of Technology students. For Subject Code, Course Title, Lecutres, Tutorials, Practice, Credits, and other information, do visit full semester subjects post given below.
For 6th Sem Scheme of Electronics & Telecommunication Engineering (ET), 2017 Onwards, do visit ET 6th Sem Scheme, 2017 Onwards. For the Elective-VII scheme of 6th Sem 2017 onwards, refer to ET 6th Sem Elective-VII Scheme 2017 Onwards. The detail syllabus for digital system design is as follows.
Digital System Design Syllabus for Electronics & Telecommunication Engineering (ET) 3rd Year 6th Sem 2017 DBATU
Course Objectives:
For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier..
Course Outcomes:
Having successfully completed this course, the student will be able to:
- Understand the basic logic gates and various variable reduction techniques of digital logic circuit in detail.
- Understand, identify and design combinational and sequential circuits.
- Design and implement hardware circuit to test performance and application for what it is being designed.
- Simulate and verify using computer simulation software to obtain desired result.
- Understand and verify simulated circuit model with hardware implementation.
Unit 1
Combinational Logic Design
Standard representations for logic functions, k map representation of logic functions (SOP m POS forms), minimization of logical functions for minterms and maxterms (upto 4 variables), dont care conditions, Design Examples: Arithmetic Circuits, BCD – to – 7 segment decoder, Code converters. Quine Mc-Cluskey methods. Adders and their use as subtractors, look ahead carry, ALU, Digital Comparator, Parity generators/checkers, Static and dynamic hazards for combinational logic. Multiplexers and their use in combinational logic designs, multiplexer trees, Demultiplexers and their use in combinational logic designs, Decoders, demultiplexer trees.
Unit 2
For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier..
Unit 3
Introduction to HDLs
Library, Entity, Architecture, Modeling styles, Data objects, Concurrent and sequential statements, Design examples, using VHDL for basic combinational and sequential circuits, Attributes (required for practical) (Test benches and FSM excluded)
Unit 4
State Machines
Basic design steps- State diagram, State table, State reduction, State assignment, Mealy and Moore machines representation, Implementation, finite state machine implementation, Sequence detector, Introduction to algorithmic state machine.
Unit 5
For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier..
Unit 6
Programmable Logic Devices and Semiconductor Memories
- Programmable logic devices: Detail architecture, Study of PROM, PAL, PLA, Designing combinational circuits using PLDs.
- Semiconductor memories: memory organization and operation, expanding memory size, Classification and characteristics of memories, RAM, ROM, EPROM, EEPROM, NVRAM, SRAM, DRAM, expanding memory size, Synchronous DRAM (SDRAM), Double Data Rate SDRAM, Synchronous SRAM, DDR and QDR SRAM, Content Addressable Memory.
Reference/Text Book:
- R.P. Jain, Modern digital electronics, 3rdedition, 12threprint TMH Publication, 2007.
- Stephen Brown, Fundamentals of digital logic design with VHDL 1st edition, TMH Publication 2002.
- Wakerly Pearon, Digital Design: Principles and Practices, 3rd edition, 4th reprint, Pearon Education, 2004.
- Anand Kumar, Fundamentals of digital circuits 1stedition, PHI publication, 2001.
- Mark Bach, Complete Digital Design, Tata MC Graw Hill, 2005.
For detail syllabus of all subjects of Electronics & Telecommunication Engineering (ET) 6th Sem 2017 onwards, visit ET 6th Sem Subjects of 2017 Onwards.