BMC702: Basics of Vlsi Syllabus for BM 7th Sem 2019 Pattern Mumbai University

Basics of Vlsi detailed syllabus scheme for Biomedical Engineering (BM), 2019 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.

For all other Mumbai University Biomedical Engineering 7th Sem Syllabus 2019 Pattern, do visit BM 7th Sem 2019 Pattern Scheme. The detailed syllabus scheme for basics of vlsi is as follows.

Basics of Vlsi Syllabus for Biomedical Engineering BE 7th Sem 2019 Pattern Mumbai University

Course Objectives:

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
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Course Outcomes:

A Learner will be able to

• Understand hardware description language used to model circuits
• Implement some basic digital circuits using HDL
• Understand the physics of MOS devices
• Understand the implementation of inverter circuits using CMOS devices and noise in these circuits
• Understand the fabrication technology used in IC fabrication and how system clocking is designed.
• Understand the design rules and layouts for various digital gates

Module 1

Introduction to VHDL hardware description language, core features of VHDL, data types, concurrent and sequential statements, data flow, behavioral, structural architecture. 04

Module 2

Combinational and Sequential Logic design using VHDL .Using VHDL combinational circuit design examples- multipliers, decoders and encoders, cascading comparator. VHDL sequential circuit design features. Implementation of counters and registers in VHDL

Module 3

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier.
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Module 4

MOS Transistors, MOS transistor switches, Basic MOS inverter and its working, types of MOS invertors viz active load nMOS inverter, MOSFET Inverter with E-nMOS as pull up, MOSFET Inverter with D- nMOS as pull up, MOSFET Inverter with pMOS as pull up, CMOS inverter, voltage transfer characteristics, noise immunity and noise margins, power and area considerations ,Parameter measurement in MOS circuits 08

Module 5

Silicon Semiconductor Technology Wafer processing, mask generation, oxidation, epitaxy growth diffusion, ion implantation, lithography, etching, metalization, basic NMOS and PMOS processes. Latch up in CMOS and CMOS using twin tub process. Scaling of MOS circuits, types of scaling and limitations of scaling. Introduction to VLSI Clocking and System Design: Clocking: CMOS clocking styles, Clock generation, stabilization and distribution. Low Power CMOS Circuits: Various components of power dissipation in CMOS, Limits on low power design, low power design through voltage scaling. 10

Module 6

Design rules and Layout NMOS and CMOS design rules and layout, Design of NMOS and CMOS inverters, NAND and NOR gates. Interlayer contacts, butting and buried contacts, stick diagrams, layout of inverter, NAND and NOR gates. Design of basic VLSI circuits Design of circuits like multiplexer, decoder, Flip flops, using MOS circuits 10

Assessment:

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier.
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Text Books:

1. Introduction to VLSI design, E. D. Fabricus, McGraw Hill Publications, first edition, 1990
2. Basic VLSI Design D.A. Pucknell and Eshraghian,
3. Digital Design Principles and Practises John F Wakerly,
4. CMOS Digital Integrated Circuits, Kang , Tata McGraw Hill Publications

Reference Books:

1. VHDL Programming by Examples Douglas Perry, , Tata McGraw Hill Publications, 2002
2. Principles of CMOS VLSI Design : ASystems Perspective Neil H.E. Weste, Kamran Eshraghian second edition, Addison Wesley Publications, 1993
3. Digital Integrated Circuits: A Desiqn Perspective, Rabaey Jan M., Chandrakasan Anantha, Nikolic Borivoje, second edition, Prentice Hall of India

Theory Examination:

1. Question paper will comprise of total 06 questions, each carrying 20 marks.
2. Total 04 questions need to be solved.
3. Question No: 01 will be compulsory and based on entire syllabus wherein sub-questions of marks will be asked.
4. Remaining questions will be randomly selected from all the modules.

For detail syllabus of all other subjects of Biomedical Engineering (BM) 7th Sem 2019 regulation, visit BM 7th Sem Subjects syllabus for 2019 regulation.