Digital Electronics detailed syllabus scheme for Biomedical Engineering (BM), 2017 regulation has been taken from the University of Mumbai official website and presented for the Bachelor of Engineering students. For Course Code, Course Title, Test 1, Test 2, Avg, End Sem Exam, Team Work, Practical, Oral, Total, and other information, do visit full semester subjects post given below.
For all other Mumbai University Biomedical Engineering 4th Sem Syllabus 2017 Pattern, do visit BM 4th Sem 2017 Pattern Scheme. The detailed syllabus scheme for digital electronics is as follows.
Digital Electronics Syllabus for Biomedical Engineering SE 4th Sem 2017 Pattern Mumbai University
Course Objectives:
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Course Outcomes:
Learner will be able to:
- Understand various number systems and its arithmetic (BCD, Binary, Octal, Hexadecimal etc)
- Solve sums on K-maps, Boolean algebra and SOP-POS implementations.
- Design code converter circuits, parity generator-checker circuits and magnitude comparator circuits.
- Design circuits using multiplexers, demultiplexers, and decoders.
- Design synchronous and asynchronous counters and registers using flip flops.
- Design various gates using various logic families.
Module 1
Introduction: Number system, Binary, Octal, Hexadecimal and other. Conversion from One system to another, Binary, BCD and Hexadecimal. Binary Arithmetic (addition, subtraction, multiplication, division) Hexadecimal and octal arithmetic, first and second complement methods. Binary Codes: Weighted Reflective, Sequential, Gray, Error detecting codes, Odd, Even parity, Hamming Codes, Alphanumeric, Morse, Teletypewriter ASCII, EBCDIC codes, Converting Binary to Gray & Gray to Binary, Conversion from BCD to XS3. Application of gray code, shaft position encoding. Boolean Algebra Logic Gates: AND, OR, NOT, XOR, XNOR, operation NAND, NOR used of the universal gate for Performing different operation. Laws of Boolean algebra. De- Morgans theorems. Relating a Truth Table to a Boolean Expression. Multi level circuits. 05
Module 2
Combinational Circuits: K-MAPS and their use in specifying Boolenan Expressions, Minterm, Maxterm SOP and POS Implementation. Implementation a logic function using universal gates. Variable entered maps For five and six variable functions Quine Mc Clusky tabular techniques. 05
Module 3
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Module 4
Sequential Logic Circuits: Comparison of Combinational & Sequential Circuits, Multi-vibrators (Astable, Monostable And Bistable) Flip-Flops, SR, T, D, JK, Master Slave JK, Converting one Flip-Flop to another, State transition diagrams, Use of Denounce switch. Counter Modulus of a counter, Ripple counter, Up/Down Counter, Designing sequential counters using gate IC and counter IC by drawing state transition Diagram & state transition table. Ring counter Johnson counter, twisted ring counter, Pseudo Random number generator, Unused states and locked conditions. 08
Module 5
Registers: Serial input serial output, serial input parallel output, Left Right shift register, Use of register ICs for sequence generator and counter. Bidirectional shift register, Universal shift register 10
Module 6
Logic Families: RTL, DTL, TTL, schotkey clamped TTL, Tristate gate ECL, IIL, MOS device CMOS Comparison of logic families, interfacing different families. TTL with CMOS, NMOS, TTL, ECL, & TTL, IIL, & TTL. 05
Text Books:
For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdf platform to make students’s lives easier..
Reference Books:
- James Bignell & Robert Donovan, Digital Electronics, Delmar, Thomas Learning,
- Jog N.K, Logic Circuits, 2nd edition, Nandu Publisher & Printer Pvt .Ltd. 1998.
- Alan b Marcovitz, Introduction to Logic Design , McGraw Hill International 2002.
Assessment:
Internal Assessment consists of two tests out of which; one should be compulsory class test (on minimum 02 Modules) and the other is either a class test or assignment on live problems or course project.
Theory Examination:
- Question paper will comprise of 6 questions, each carrying 20 marks.
- Total four questions need to be solved.
- Q.1 will be compulsory, based on entire syllabus wherein sub questions of 2 to 5 marks will be asked.
- Remaining question will be randomly selected from all the modules
For detail syllabus of all other subjects of Biomedical Engineering (BM) 4th Sem 2017 regulation, visit BM 4th Sem Subjects syllabus for 2017 regulation.