{"id":8017,"date":"2024-04-04T11:28:52","date_gmt":"2024-04-04T11:28:52","guid":{"rendered":"https:\/\/www.inspirenignite.com\/kl\/6041b-verilog-hdl-programmable-logic-devices-syllabus-for-electronics-engineering-6th-sem-2021-revision-sitttr-professional-elective-iii\/"},"modified":"2024-04-04T11:28:52","modified_gmt":"2024-04-04T11:28:52","slug":"6041b-verilog-hdl-programmable-logic-devices-syllabus-for-electronics-engineering-6th-sem-2021-revision-sitttr-professional-elective-iii","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/kl\/6041b-verilog-hdl-programmable-logic-devices-syllabus-for-electronics-engineering-6th-sem-2021-revision-sitttr-professional-elective-iii\/","title":{"rendered":"6041B: Verilog HDL & Programmable Logic Devices Syllabus for Electronics Engineering 6th Sem 2021 Revision SITTTR (Professional Elective-III)"},"content":{"rendered":"

Verilog HDL & Programmable Logic Devices detailed syllabus for Electronics Engineering (EL) for 2021 revision curriculum has been taken from the SITTTRs<\/a> official website and presented for the Electronics Engineering (EL) students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below. <\/p>\n

For Electronics Engineering 6th Sem scheme and its subjects, do visit Electronics Engineering (EL) 6th Sem 2021 regulation scheme<\/a>. For Professional Elective-III scheme and its subjects refer to Electronics Engineering (EL) Professional Elective-III syllabus scheme<\/a>. The detailed syllabus of verilog hdl & programmable logic devices is as follows. <\/p>\n

Course Objectives:<\/h4>\n

For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App<\/a>
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b>
\"Get<\/a>. <\/p>\n

Course Outcomes:<\/h4>\n

On completion of the course, the student will be able to,<\/p>\n

    \n
  1. Outline the basics of Hardware Description Language and program structure<\/li>\n
  2. Make use of gate level modelling and dataflow modelling to design digital circuits<\/li>\n
  3. Make use of Behavioural Modelling to design combinational and sequential circuits<\/li>\n
  4. Outline the architecture of CPLDs and FPGA<\/li>\n<\/ol>\n

    Module 1:<\/h4>\n

    Evolution of Computer Aided design, Overview of Digital design with Verilog HDL -Evolution of CAD – emergence of HDLs, typical HDL based design flow- why Verilog, trends in HDLs. Hierarchical Modelling Concepts – Top-down and bottom-up design methodology, differences between modules and module instances, components of a simulation. Design block, stimulus block, basic concepts, Lexical conventions, data types, system tasks, compiler directives. Module – Components of a Verilog module, Ports – definition, list of ports, port declaration, port connection rules\n<\/p>\n

    Module 2:<\/h4>\n

    For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App<\/a>
    It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b>
    \"Get<\/a>. <\/p>\n

    Module 4:<\/h4>\n

    Simple Programmable Logic Devices, Architecture of PAL and PAL ,compare PAL and PLA, Complex Programmable Logic Devices – Architecture and applications, Field Programmable Gate arrays – Architecture and applications, comparison of CPLD and FPGA, Concept of configurable logic blocks\n<\/p>\n

    Text Books:<\/h4>\n

    For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App<\/a>
    It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b>
    \"Get<\/a>. <\/p>\n

      \n
    1. Verilog HDL -Samir Palnitkar-Pearson Education<\/li>\n
    2. Digital design Morris mano, Third Edition, PHI<\/li>\n<\/ol>\n

      Reference Books:<\/h4>\n
        \n
      1. Digital Design | With an Introduction to the Verilog HDL, VHDL, and SystemVerilog | Sixth Edition | By Pearson Paperback -2018 by M. Morris Mano , Michael D.Ciletti<\/li>\n
      2. FPGA based system design Wayne Wolf, Pearson Education<\/li>\n
      3. T.R. Padmanabhan, B Bala Tripura Sundari, Design Through Verilog HDL, Wiley 2009.<\/li>\n
      4. FPGA protyping by Verilog examples -PONG P Chu – Willey<\/li>\n
      5. HDL Prgramming- Nazeih M Botros- Dream Tech<\/li>\n
      6. Digital Systems Design with FPGAs and CPLDs -Ian Grout, Elsevier<\/li>\n<\/ol>\n

        Online Resources<\/h4>\n

        For the complete syllabus, results, class timetable, and many other features kindly download the iStudy App<\/a>
        It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b>
        \"Get<\/a>. <\/p>\n

        For detailed syllabus of all other subjects of Electronics Engineering, 2021 revision curriculum do visit Electronics Engineering (EL) 6th Sem subject syllabuses for 2021 revision<\/a>. <\/p>\n

        To see the syllabus of all other branches of diploma 2021 revision curriculum do visit SITTTR diploma all branches syllabus.<\/a>. <\/p>\n

        To see the results of Electronics Engineering of diploma 2021 revision curriculum do visit SITTTR diploma results.<\/a>. <\/p>\n

        For all Electronics Engineering academic calendars, visit Electronics Engineering all semesters academic calendar<\/a> direct link. <\/p>\n","protected":false},"excerpt":{"rendered":"

        Verilog HDL & Programmable Logic Devices detailed syllabus for Electronics Engineering (EL) for 2021 revision curriculum has been taken from the SITTTRs official website and presented for the Electronics Engineering […]<\/p>\n","protected":false},"author":2462,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[82],"tags":[],"class_list":["post-8017","post","type-post","status-publish","format-standard","hentry","category-el"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts\/8017","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/users\/2462"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/comments?post=8017"}],"version-history":[{"count":0,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts\/8017\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/media?parent=8017"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/categories?post=8017"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/tags?post=8017"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}