{"id":3008,"date":"2021-06-20T03:36:52","date_gmt":"2021-06-20T03:36:52","guid":{"rendered":"https:\/\/www.inspirenignite.com\/kl\/3042-digital-electronics-kl-diploma-syllabus-for-ece-3rd-sem-2015-revision-sitttr\/"},"modified":"2021-06-20T03:36:52","modified_gmt":"2021-06-20T03:36:52","slug":"3042-digital-electronics-kl-diploma-syllabus-for-ece-3rd-sem-2015-revision-sitttr","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/kl\/3042-digital-electronics-kl-diploma-syllabus-for-ece-3rd-sem-2015-revision-sitttr\/","title":{"rendered":"3042: Digital Electronics KL Diploma Syllabus for ECE 3rd Sem 2015 Revision SITTTR"},"content":{"rendered":"

Digital Electronics detailed syllabus for Electronics & Communication Engineering (ECE) for 2015 revision curriculum has been taken from the SITTTRs<\/a> official website and presented for the ECE students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below. <\/p>\n

For Electronics & Communication Engineering 3rd Sem scheme and its subjects, do visit ECE 3rd Sem 2015 revision scheme<\/a>. The detailed syllabus of digital electronics is as follows. <\/p>\n

Digital Electronics<\/title><\/p>\n<h4>Course Outcomes:<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" target=\"_blank\" rel=\"noopener\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>. <\/p>\n<h4>Specific outcome:<\/h4>\n<p align=\"justify\">\n MODULE I Number system and logic gates<\/p>\n<ol>\n<li>To understand various number systems\n<ol type=\"i\">\n<li>To state the need of a binary number system in modern digital technology<\/li>\n<li>To describe the features of a binary number system with examples<\/li>\n<li>To compare binary number system with decimal number system<\/li>\n<li>To explain the conversion from decimal to binary and vice versa with suitable examples<\/li>\n<li>To list the features of Hexadecimal number system with suitable examples<\/li>\n<li>To explain the Conversion of hexadecimal into decimal and binary and vice versa<\/li>\n<li>To state the need for binary codes<\/li>\n<li>To describe BCD codes, excess-3 code, Gray code<\/li>\n<li>To describe alpha numeric codes such as ASCII code and EBCDIC<\/li>\n<li>To explain binary arithmetic such as addition, subtraction, multiplication and division with examples<\/li>\n<li>To explain binary subtraction using 1’s complement and 2’s complement method<\/li>\n<\/ol>\n<\/li>\n<li>To understand the simplification of Boolean expressions\n<ol type=\"i\">\n<li>To explain the operation of AND, OR, NOT, NAND, NOR, EXOR and EXNOR with their symbols and truth tables<\/li>\n<li>To realize AND,OR, NOT, EXOR and EXNOR using universal gates<\/li>\n<li>To state Demorgan’s theorems<\/li>\n<li>To state the rules and laws of Boolean algebra<\/li>\n<li>To explain Sum Of Product (SOP) expression, Product Of Sum (POS) expression , minterms and maxterms<\/li>\n<li>To state the need for simplifying Boolean expression<\/li>\n<li>To simplify Boolean expressions with the help of logic rules and truth tables<\/li>\n<li>To state the basic principle of Karnaugh map<\/li>\n<li>To explain two variables, three variables and four variables K-maps and their reductions with the help of suitable examples<\/li>\n<li>To state Don’t care terms and their role in solving K-maps<\/li>\n<li>To list the advantages and disadvantages of K-map<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<p> MODULE II Logic families and combinational logic circuits<\/p>\n<ol>\n<li>To comprehend the various logic families\n<ol type=\"i\">\n<li>To state various scales of Integration- SSI, MSI, LSI, VLSI and ULSI<\/li>\n<li>To explain the circuit of TTL inverter<\/li>\n<li>To define the terms VIL, VIH, VOL, VOH, Noise margin, noise immunity, propagation delay, fan- in and fan-out<\/li>\n<li>To explain the working principle of CMOS NAND gate<\/li>\n<li>To list the features of CMOS logic family<\/li>\n<li>To list the features of ECL logic family<\/li>\n<li>To compare TTL, ECL and CMOS logic families with respect to current sourcing and current sinking, fan in, fan-out and power dissipation<\/li>\n<\/ol>\n<\/li>\n<li>To understand the combinational logic circuits\n<ol type=\"i\">\n<li>To describe combinational logic circuits<\/li>\n<li>To design half adder, full adder, half subtractor, and full subtractor<\/li>\n<li>To explain parallel adder<\/li>\n<li>To explain the operation of 4×1 Multiplexer and 1×4 De-multiplexer<\/li>\n<li>To list the various applications of Multiplexers and De-multiplexers<\/li>\n<li>To explain the operation of 3 bit encoder<\/li>\n<li>To explain various decoders such as BCD to decimal, binary to gray code and gray to binary<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<p> MODULE III Sequential logic circuits<\/p>\n<ol>\n<li>To understand the working of flip-flops\n<ol type=\"i\">\n<li>To describe sequential logic circuits<\/li>\n<li>To distinguish between synchronous and asynchronous sequential logic circuits<\/li>\n<li>To explain latches & flip-flops<\/li>\n<li>To explain SR flip flop using NAND & NOR gates<\/li>\n<li>To explain JK flip-flop using NAND with the help of truth table<\/li>\n<li>To state the race around condition in JK flip flop<\/li>\n<li>To list the methods for eliminating race around condition<\/li>\n<li>To explain the working of master slave JK flip flop (block level explanation only)<\/li>\n<li>To explain D and T flip flops with their characteristic tables<\/li>\n<\/ol>\n<\/li>\n<li>To comprehend shift registers\n<ol type=\"i\">\n<li>To explain the functions of Shift registers<\/li>\n<li>To explain the working of shift registers:-serial-in serial-out, parallel-in parallel-out, parallel-in serial-out and serial- in parallel-out<\/li>\n<li>To differentiate between right shift and left shift registers<\/li>\n<li>To explain the working of ring counter and its applications<\/li>\n<li>To explain the working of Johnson counter and its applications<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<p> MODULE IV Counters, ADC and DAC<\/p>\n<ol>\n<li>To understand the working of various counters\n<ol type=\"i\">\n<li>To differentiate between synchronous and asynchronous counters<\/li>\n<li>To implement mod-10 asynchronous counter using JK flip flop<\/li>\n<li>To explain mod-8 synchronous counter and its realization using JK flip flop<\/li>\n<li>To explain 3 bit up-down counter using JK flip flop<\/li>\n<\/ol>\n<\/li>\n<li>To understand ADC and DAC\n<ol type=\"i\">\n<li>To list the different types of ADC and DAC<\/li>\n<li>To state DAC specifications – resolution, accuracy and settling time<\/li>\n<li>To explain Weighted resistor DAC and R-2R ladder type DAC<\/li>\n<li>To explain different types of ADCs – Counter type, Successive approximation type and Flash type<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<h4>MODULE I –<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" target=\"_blank\" rel=\"noopener\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>. <\/p>\n<h4>MODULE II –<\/h4>\n<p align=\"justify\">\n Logic families and combinational logic circuits Logic families – SSI, MSI, LSI, VLSI and ULSI – transistor transistor logic – VIL, VIH, VOL, VOH, noise margin, noise immunity, propagation delay, fan-in and fan-out – TTL inverter – features of CMOS logic gates and ECL logic family – comparison of TTL, ECL and CMOS logic families with respect to current sourcing and current sinking, fan in, fan-out and power dissipation – combinational logic circuits – introduction -design half adder, full adder, half subtractor and full subtractor – parallel adder-multiplexer \/ data selector – 4 to 1 MUX – applications of MUX – demultiplexer – 1 to 4 demultiplexer – 3 bit encoder -decoders – BCD to decimal, binary to gray code and gray to binary\n<\/p>\n<h4>MODULE III –<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" target=\"_blank\" rel=\"noopener\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>. <\/p>\n<h4>MODULE IV –<\/h4>\n<p align=\"justify\">\n Counters, ADC and DAC Binary counters – implementation of asynchronous mod-10 counter – implementation of mod-8 synchronous counter – 3-bit up down counter – DAC – specifications – resolution, accuracy, settling time -different types – binary weighted resister method and R-2R ladder type – ADC – counter type -successive approximation type – flash type\n<\/p>\n<h4>Text Books:<\/h4>\n<p id=\"istudy\" style=\"text-align:center\">For the complete syllabus, results, class timetable, and many other features kindly download the <a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">iStudy App<\/a><br \/><b> It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.<\/b><br \/><a class=\"rank-math-link\" href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy&pcampaignid=pcampaignidMKT-Other-global-all-co-prtnr-py-PartBadge-Mar2515-1\" target=\"_blank\" rel=\"noopener\"><img decoding=\"async\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" style=\"height:65px\"><\/a>. <\/p>\n<h4>Reference Books:<\/h4>\n<p align=\"justify\">\n<ol>\n<li>A Anand Kumar- Fundamentals of digital circuits PHI<\/li>\n<li>Anil K Maini -Digital Electronics .Weiley<\/li>\n<\/ol>\n<p align=\"justify\">For detailed syllabus of all other subjects of Electronics & Communication Engineering, 2015 revision curriculum do visit <a class=\"rank-math-link\" href=\"..\/category\/ece+3rd-sem\">ECE 3rd Sem subject syllabuses for 2015 revision<\/a>. <\/p>\n<p align=\"justify\">To see the syllabus of all other branches of diploma 2015 revision curriculum do visit <a class=\"rank-math-link\" href=\"https:\/\/www.inspirenignite.com\/kl\/kerala-diploma-syllabus\/\">all branches of SITTTR diploma 2015 revision<\/a>. <\/p>\n","protected":false},"excerpt":{"rendered":"<p>Digital Electronics detailed syllabus for Electronics & Communication Engineering (ECE) for 2015 revision curriculum has been taken from the SITTTRs official website and presented for the ECE students. For course […]<\/p>\n","protected":false},"author":2462,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[34,50],"tags":[],"class_list":["post-3008","post","type-post","status-publish","format-standard","hentry","category-3rd-sem","category-ece"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts\/3008","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/users\/2462"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/comments?post=3008"}],"version-history":[{"count":0,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/posts\/3008\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/media?parent=3008"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/categories?post=3008"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/kl\/wp-json\/wp\/v2\/tags?post=3008"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}