HDL and Simulation Software Lab detailed syllabus for Electronics Engineering (EE) for 2015 revision curriculum has been taken from the SITTTRs official website and presented for the EE students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.
For Electronics Engineering 6th Sem scheme and its subjects, do visit EE 6th Sem 2015 revision scheme. The detailed syllabus of hdl and simulation software lab is as follows.
Course Outcomes:
On completion of the course, the student will be able:
- To write simple programs in Verilog HDL and test them using simulator Software and implement it into an FPGA kit (Gate level, Data flow and behaviour level)
- Basic gates (Gate level, Data flow and behaviour level)
- 4 to 1 multiplexer
- Decoder
- Full adder
- 4 bit full adder
- D flip-flop
- JK flip-flop
- Ripple counter
- Shift Register
- To write MATLAB programs and simulate using command prompt and script
- To perform basic matrix operations (addition, subtraction, multiplication, division & inverse) using command prompt.
- To find solution to linear equations using script editor.
- To determine eigen values and eigen vectors of a square matrix using command prompt.
- To determine the roots of a polynomial using script editor.
- To plot 2D and 3D curves using command prompt and script editor.
- To differentiate and integrate a given function.
- To determine the time response of RLC circuits using simulink.
- To plot amplitude modulated wave by giving carrier, modulating signal and depth of modulation using simulink.
For detailed syllabus of all other subjects of Electronics Engineering, 2015 revision curriculum do visit EE 6th Sem subject syllabuses for 2015 revision.
To see the syllabus of all other branches of diploma 2015 revision curriculum do visit all branches of SITTTR diploma 2015 revision.