Digital Computer Fundamentals Lab detailed syllabus for Computer Engineering (CT) for 2021 revision curriculum has been taken from the SITTTRs official website and presented for the Computer Engineering students. For course code, course name, number of credits for a course and other scheme related information, do visit full semester subjects post given below.
For Computer Engineering 3rd Sem scheme and its subjects, do visit Computer Engineering (CT) 3rd Sem 2021 revision scheme. The detailed syllabus of digital computer fundamentals lab is as follows.
Course Objectives:
- Understand digital systems and data representation.
- Understand digital ICs and their operations.
- Design simple combinational and sequential circuits.
Course Outcomes:
On completion of the course student will be able to:
- Construct gates using universal gates.
- Minimize and Implement combinational logic functions.
- Develop combinational logic circuits.
- Develop Sequential logic circuits.
Module 1:
- Show the logic behavior of gates by using gate ICs
- Construct gates using Universal Gates
Module 2:
- Make use of Boolean algebra and the Karnaugh Map method for the implementation of logic functions in SOP.
- Make use of Boolean algebra and the Karnaugh Map method for the implementation of logic functions in POS.
Module 3:
- Construct half adder, full adder circuits by using basic, XOR gates and NAND gates
- Construct the Combinational Circuit that generates parity bit to follow even parity from four message bits
- Design and implement a combinational circuit that converts a 4-bit Gray code to binary
- Interpret the pin-out of parallel adder IC and Develop a four-bit binary Adder-Subtractor using the IC
Module 4:
- Construct Latches and Flip flops using logic gate ICs and infer their working
- Demonstrate the pin-outs and functions of JK and D Flip flop ICs
- Construct a 4 bit ripple counter using JK FF IC and infer the working
- Construct synchronous counters like 3 bit binary counter, decimal counter etc using JK FF ICs and infer the working
- Open Ended Experiments – **
Suggested Open Ended Experiments
(Not for End Semester Examination but compulsory to be included in Continuous Internal Evaluation. Students can do open ended experiments as a group of 2-3. There is no duplication in experiments between groups. Open ended experiments should include Combinational and/or Sequential logic)
- Develop a circuit that converts a 4 bit binary number to display its hexadecimal equivalent in a 7 segment display
- Develop a 4 bit synchronous counter that counts a given sequence in a seven segment display
Text Books:
- M. Morris Mano & Michael D. Ciltti, Digital Design, Pearson Education, 5th Edition
Reference Books:
- A. Anand Kumar, Fundamentals of digital circuits, PHI Learning Pvt. Ltd., 2003
- Malvino & Leach, Digital Principles and Applications, McGraw-Hill
Online Resources
- http://www. asic-world.com/digital/tutorial.html
- https://www.geeksforgeeks.org/digital-electronics-logic-design-tutorials/
- https://www.digitalelectronicsdeeds.com/
- https://en.wikipedia.org/wiki/Digital_electronics
- https://www.iitg.ac.in/cseweb/vlab/Digital-System-Lab/experiments.php
For detailed syllabus of all other subjects of Computer Engineering (CT), 2021 revision curriculum do visit Computer Engineering 3rd Sem subject syllabuses for 2021 revision.
To see the syllabus of all other branches of diploma 2021 revision curriculum do visit SITTTR diploma all branches syllabus..
To see the results of Computer Engineering (CT) of diploma 2021 revision curriculum do visit SITTTR diploma Computer Engineering (CT) results..
For all Computer Engineering academic calendars, visit Computer Engineering all semesters academic calendar direct link.