JNTUK B.Tech VLSI Design gives you detail information of VLSI Design R13 syllabus It will be help full to understand you complete curriculum of the year.
OBJECTIVES
The student will be introduced to
- Use mathematical methods and circuit analysis models in analysis of CMOSdigital electronics circuits, including logic components and their interconnects.
- Learn the various fabrication steps of IC and come across basic electrical properties of MOSFET.
- Apply CMOS technology-specific layout rules in the placement and routing of transistors and interconnect and to verify the functionality, timing, power and parasitic effects.
- The concepts and techniques of modern integrated circuit design and testing (CMOS VLSI).
- Design static CMOS combinational and sequential logic at the transistor level, including mask layout.
Unit-I: Introduction : Introduction to IC Technology, MOS and related VLSI Technology, Basic MOS Transistors, Enhancement and Depletion modes of transistor action, IC production process, MOS and CMOS Fabrication processes, BiCMOS Technology, Comparison between CMOS and Bipolar technologies.
Basic Electrical Properties Of MOS and Bi-CMOS Circuits: Ids versus Vds Relationships, Aspects of MOS transistor Threshold Voltage, MOS transistor Trans, Output Conductance and Figure of Merit. The Pass transistor, NMOS Inverter, Pull-up to Pull-down Ratio for NMOS inverter driven by another
NMOS inverter. Alternative forms of pull-up, The CMOS Inverter, MOS transistor circuit model, Bi-CMOS Inverter, Latch-up in CMOS circuits and BiCMOS Latch-up Susceptibility.
Unit-II: MOS and Bi-CMOS Circuit Design Processes: MOS Layers, Stick Diagrams, Design Rules and Layout, General observations on the Design rules, 2µm Double Metal, Double Poly, CMOS/BiCMOS rules, 1.2µm Double Metal, Double Poly CMOS rules, Layout Diagrams of NAND and NOR gates and CMOS inverter, Symbolic Diagrams-Translation to Mask Form.
Unit-III: Basic Circuit Concepts: Sheet Resistance, Sheet Resistance concept applied to MOS transistors and Inverters, Area Capacitance of Layers, Standard unit of capacitance, The Delay Unit, Inverter Delays, Propagation Delays, Wiring Capacitances, Fan-in and fan-out characteristics, Choice of layers, Transistor switches, Realization of gates using NMOS, PMOS and CMOS technologies. Scaling Of MOS Circuits: Scaling models, Scaling factors for device parameters, Limits due to sub threshold currents, current density limits on logic levels and supply voltage due to noise.
Unit-IV: Subsystem Design: Architectural issues, switch logic, Gate logic, examples of structured design, clocked sequential circuits, system considerations, general considerations of subsystem design processes, an illustration of design processes.
Unit-V: VlSI Design Issues: VLSI Design issues and design trends, design process, design for testability, technology options, power calculations, package selection, clock mechanisms, mixed signal design, ASIC design flow, FPGA design flow, introduction to SoC design.
Unit-VI: FPGA Design: Basic FPGA architecture, , FPGA configuration, configuration modes, FPGA design process- FPGA design flow, FPGA families, FPGA design examples-stack, queue and shift register implementation using VHDL, step-by-step approach of FPGA design process on Xilinx environment.
Text Books:
- Essentials of VLSI Circuits and Systems By Kamran Eshraghian, Douglas and A. Pucknell and Sholeh Eshraghian, Prentice-Hall of India Private Limited,2005 Edition.
- VLSI Design-Black Book By Dr. K.V.K.K. Prasad, Kattul Shyamala, Kogent Learning Solutions Inc.2012 Edition.
References
- VLSI Design By A.Albert Raj & T.Latha,PHI Learning Private Limited,2010.
- VLSI Design-A.Shanthi and A.Kavita, New Age International Private Limited, 2006 First Edition.
OUTCOMES
After going through this course the student will be able to
- Apply the Concept of design rules during the layout of a circuit. Model and simulate digital VLSI systems using hardware design language.
- Synthesize digital VLSI systems from register-transfer or higher level descriptions
- Understand current trends in semiconductor technology, and how it impacts scaling and performance.
For more information about all JNTU updates please stay connected to us on FB and don’t hesitate to ask any questions in the comment.