Syllabus

JNTUK B.Tech System on Chip (Elective – IV) for R13 Batch.

JNTUK B.Tech System on Chip gives you detail information of System on Chip R13 syllabus It will be help full to understand you complete curriculum of the year.

OBJECTIVES
After going through this course the student will be able to

  • Understand the System Architecture and Processor Architecture, approach for a SOC Design.
  • Learn the, Basic concepts in Processor Micro Architecture, and Learn Different Types of Processors like VLIW Processors, Superscalar Processors etc.
  • Learn about SOC external memory, Scratchpads and Cache memory and Multilevel Caches.
  • Learn the SOC Design approach, Design and evaluation, Applications Like Image compression etc…

UNIT-I: Introduction to the System Approach: System Architecture, Components of the system, Hardware & Software, Processor Architectures, Memory and Addressing. System level interconnection, an approach for SOC Design, System Architecture and Complexity.

UNIT-II: Processors : Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Micro Architecture, Basic elements in Instruction handling. Buffers: minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector Instructions extensions, VLIW Processors, Superscalar Processors.

UNIT-III: Memory Design for SOC: Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory, Cache Organization, Cache data, Write Policies, Strategies for line replacement at miss time, Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC Memory System, Models of Simple Processor – memory
interaction.

UNIT-IV: Interconnect Customization and Configuration: Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses, Analytic Bus Models, Using the Bus model, Effects of Bus transactions and contention time. SOC Customization: An overview, Customizing Instruction Processor.

UNIT-V: Interconnect Configuration: Reconfiguration Technologies, Mapping design onto Reconfigurable devices, Instance- Specific design, Customizable Soft Processor, Reconfiguration – overhead analysis and trade-off analysis on reconfigurable Parallelism.

UNIT-VI: Application Studies / Case Studies: SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG compression.

Text Books

  • Computer System Design System-on-Chip – Michael J. Flynn and Wayne Luk, Wiely India Pvt. Ltd.
  • Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004, Springer

Reference Books

  • ARM System on Chip Architecture – Steve Furber –2nd Ed., 2000, Addison Wesley Professional.
  • System on Chip Verification – Methodologies and Techniques – Prakash Rashinkar, Peter Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.

OUTCOMES
After going through this course the student will be able to

  • Know basics of System Architecture and Processor Architecture.
  • Know different Types of Processors Like VLIW Processors, Superscalar Processors etc. and Basic concepts in Processor Micro Architecture.
  • Distinguish Cache memory and Multilevel Caches, SOC external memory.
  • Know the Concept of Inter Connect Architectures, SOC Standard Buses and Reconfiguration Technologies.

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