JNTUK B.Tech Low Power VLSI Design (Elective – IV) for R13 Batch.

JNTUK B.Tech Low Power VLSI Design gives you detail information of Low Power VLSI Design R13 syllabus It will be help full to understand you complete curriculum of the year.

OBJECTIVES

• The student will be able to understand the Fundamentals of Low Power VLSI Design.
• In this course, students can study low-Power Design Approaches, Power estimation and analysis.
• Another main object of this course is to motivate the graduate students to study and to analyze the Low-Voltage Low-Power Adders, Multipliers.
• The concepts of Low-Voltage Low-Power Memories and Future Trend and Development of DRAM.

UNIT-I: Fundamentals of Low Power VLSI Design: Need for Low Power Circuit Design, Sources of Power Dissipation – Switching Power Dissipation, Short Circuit Power Dissipation, Leakage Power Dissipation, Glitching Power Dissipation, Short Channel Effects –Drain Induced Barrier Lowering and Punch Through, Surface Scattering, Velocity Saturation, Impact Ionization, Hot Electron Effect.

UNIT-II: Low-Power Design Approaches: Low-Power Design through Voltage Scaling:VTCMOS circuits, MTCMOS circuits, Architectural Level Approach –Pipelining and Parallel Processing Approaches.
Switched Capacitance Minimization Approaches: System Level Measures, Circuit Level Measures, Mask level Measures.

UNIT-III: Power estimation and analysis: SPICE circuit simulators, gate level logic simulation, capacitive power estimation, static state power and gate level capacitance estimation.

UNIT-IV: Low-Voltage Low-Power Adders: Introduction, Standard Adder Cells, CMOS Adder’s Architectures – Ripple Carry Adders, Carry Look-Ahead Adders, Carry Select Adders, Carry Save Adders, Low-Voltage Low-Power Design Techniques –Trends of Technology and Power Supply Voltage, Low- Voltage Low-Power Logic Styles.

UNIT-V: Low-Voltage Low-Power Multipliers Introduction, Overview of Multiplication, Types of Multiplier Architectures, Braun Multiplier, Baugh- Wooley Multiplier, Booth Multiplier, Introduction to Wallace Tree Multiplier.

UNIT-VI: Low-Voltage Low-Power Memories: Basics of ROM, Low-Power ROM Technology, Future Trend and Development of ROMs, Basics of SRAM, Memory Cell, Precharge and Equalization Circuit, Low-Power SRAM Technologies, Basics of DRAM, Self-Refresh Circuit, Future Trend and Development of DRAM.

Text Books

• Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH Professional Engineering.
• Reference Books:
• Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad, John Wiley & Sons, 2000.
• Practical Low Power Digital VLSI Design – Gary K. Yeap, Kluwer Academic Press, 2002.

OUTCOMES
After going through this course the student will be able to

• Understand the concepts of Low-Power Design Approaches.
• Design and analysis of Low-Voltage Low-Power Circuits.
• Extend the Low Power Design to Different Applications.
• Understand of Low-Voltage Low-Power Memories and Basics of DRAM.

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