{"id":9446,"date":"2018-08-29T15:21:40","date_gmt":"2018-08-29T15:21:40","guid":{"rendered":"https:\/\/www.inspirenignite.com\/jntuh\/?p=9446"},"modified":"2026-05-24T10:54:24","modified_gmt":"2026-05-24T05:24:24","slug":"jntuh-m-tech-2017-2018-r17-detailed-syllabus-cmos-digital-integrated-circuit-design","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-m-tech-2017-2018-r17-detailed-syllabus-cmos-digital-integrated-circuit-design\/","title":{"rendered":"JNTUH M.Tech 2017-2018 (R17) Detailed Syllabus CMOS Digital Integrated Circuit Design"},"content":{"rendered":"CMOS Digital Integrated Circuit Design Detailed Syllabus for Embedded Systems &amp; VLSI Design\/ VLSI and Embedded Systems\/ Electronics Design Technology M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.\r\n\r\nThe detailed syllabus for CMOS Digital Integrated Circuit Design M.Tech 2017-2018 (R17) first year first sem is as follows.\r\n\r\nM.Tech. I Year I Sem.\r\n\r\n<strong>UNIT \u2013I : MOS Design:<\/strong>Pseudo NMOS Logic \u2013 Inverter, Inverter threshold voltage, Output high voltage, Output Low voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS logic gates, Transistor equivalency, CMOS Inverter logic.\r\n\r\n<strong>UNIT \u2013II : Combinational MOS Logic Circuits:<\/strong>MOS logic circuits with NMOS loads, Primitive CMOS logic gates \u2013 NOR &amp; NAND gate, Complex Logic circuits design \u2013 Realizing Boolean expressions using NMOS gates and CMOS gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with Transmission gates.\r\n\r\n<strong>UNIT \u2013III : Sequential MOS Logic Circuits:<\/strong> Behavior of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch, and edge triggered flip-flop.\r\n\r\n<strong>UNIT \u2013IV : Dynamic Logic Circuits:<\/strong> Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic CMOS transmission gate logic, High performance Dynamic CMOS circuits.\r\n\r\n<strong>UNIT \u2013V\u00a0 : Semiconductor Memories:<\/strong> Types, RAM array organization, DRAM \u2013 Types, Operation, Leakage currents in DRAM cell and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR flash and NAND flash.\r\n\r\n<strong>TEXT BOOKS:<\/strong>\r\n<ul>\r\n \t<li>Ken Martin, \u201cDigital Integrated Circuit Design\u201d, Oxford University Press, 2011.<\/li>\r\n \t<li>Sung-Mo Kang, Yusuf Leblebici, \u201cCMOS Digital Integrated Circuits Analysis and Design\u201d, TMH, 3rd Edition, 2011.<\/li>\r\n<\/ul>\r\n<strong>REFERENCE BOOKS:<\/strong>\r\n<ul>\r\n \t<li>Ming-BO Lin, \u201cIntroduction to VLSI Systems: A Logic, Circuit and System Perspective\u201d, CRC Press, 2011<\/li>\r\n \t<li>Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, \u201cDigital Integrated Circuits \u2013 A Design Perspective\u201d, 2nd Edition, PHI.<\/li>\r\n<\/ul>\r\nFor all other M.Tech 1st Year 1st Sem syllabus go to <a href=\"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-first-year-first-sem-embedded-systems-vlsi-design-vlsi-and-embedded-systems-electronics-design-technology-for-m-tech-2017-2018-r17-batch\/\">JNTUH M.Tech Embedded Systems &amp; VLSI Design\/ VLSI and Embedded Systems\/ Electronics Design Technology 1st Year 1st Sem Course Structure for (R17) Batch.<\/a>\r\n\r\nAll details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.\r\n\r\nDo share with friends and in case of questions please feel free drop a comment.\n\n<h2>Download iStudy App (Android &amp; iOS)<\/h2>\n<div style=\"width: 100%;text-align: center;background: #f0f7ff;border: 1px solid #d9e8ff;border-radius: 10px;padding: 12px 10px;margin: 8px 0 12px 0\">\n<p style=\"margin: 0 0 8px 0\">Get instant JNTUH updates, timetables, results, and notices on mobile.<\/p>\n<div style=\"justify-content: center;align-items: flex-start;gap: 24px;flex-wrap: wrap\">\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><img decoding=\"async\" style=\"height: 54px;width: auto\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" \/>\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\u00a0<img decoding=\"async\" style=\"height: 80px;width: 80px\" src=\"https:\/\/api.qrserver.com\/v1\/create-qr-code\/?size=120x120&amp;data=https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" alt=\"Android app QR code\" \/><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">Android App<\/a><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><img decoding=\"async\" style=\"height: 40px;width: auto\" src=\"https:\/\/upload.wikimedia.org\/wikipedia\/commons\/3\/3c\/Download_on_the_App_Store_Badge.svg\" alt=\"Download on the App Store\" \/>\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\u00a0<img decoding=\"async\" style=\"height: 80px;width: 80px\" src=\"https:\/\/api.qrserver.com\/v1\/create-qr-code\/?size=120x120&amp;data=https:\/\/apps.apple.com\/us\/app\/istudy-app-syllabus-papers\/id6478500231\" alt=\"iOS app QR code\" \/><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><a href=\"https:\/\/apps.apple.com\/us\/app\/istudy-app-syllabus-papers\/id6478500231\" target=\"_blank\" rel=\"noopener\">iOS App <\/a><\/div>\n<\/div>\n<\/div>\n\n\n<p class=\"wp-block-paragraph\"><\/p>\n","protected":false},"excerpt":{"rendered":"<p>CMOS Digital Integrated Circuit Design Detailed Syllabus for Embedded Systems &amp; VLSI Design\/ VLSI and Embedded Systems\/ Electronics Design Technology M.Tech first year first sem is covered here. This gives [&hellip;]<\/p>\n","protected":false},"author":2259,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[73,62],"tags":[],"class_list":["post-9446","post","type-post","status-publish","format-standard","hentry","category-m-tech","category-syllabus"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/9446","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/users\/2259"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/comments?post=9446"}],"version-history":[{"count":3,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/9446\/revisions"}],"predecessor-version":[{"id":40488,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/9446\/revisions\/40488"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/media?parent=9446"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/categories?post=9446"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/tags?post=9446"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}