{"id":8999,"date":"2018-08-25T13:17:25","date_gmt":"2018-08-25T13:17:25","guid":{"rendered":"https:\/\/www.inspirenignite.com\/jntuh\/?p=8999"},"modified":"2026-05-24T10:58:08","modified_gmt":"2026-05-24T05:28:08","slug":"jntuh-m-tech-2017-2018-r17-detailed-syllabus-architectures-and-applications","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-m-tech-2017-2018-r17-detailed-syllabus-architectures-and-applications\/","title":{"rendered":"JNTUH M.Tech 2017-2018 (R17) Detailed Syllabus Algorithms for VLSI Design Automation"},"content":{"rendered":"Algorithms for VLSI Design Automation Detailed Syllabus for VLSI\/ VLSI Design\/VLSI System Design M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.\r\n\r\nThe detailed syllabus for Algorithms for VLSI Design Automation M.Tech 2017-2018 (R17) first year first sem is as follows.\r\n\r\nM.Tech. I Year I Sem.\r\n\r\n<strong>UNIT- I : PRELIMINARIES:<\/strong> Introduction to Design Methodologies, Design Automation tools, Algorithmic Graph Theory, Computational complexity, Tractable and Intractable problems.\r\n\r\n<strong>UNIT -II : GENERAL PURPOSE METHODS FOR COMBINATIONAL OPTIMIZATION:<\/strong> Backtracking, Branch and Bound, Dynamic Programming, Integer Linear Programming, Local Search, Simulated Annealing, Tabu search, Genetic Algorithms.\r\n\r\n<strong>UNIT- III : LAYOUT COMPACTION, PLACEMENT, FLOOR PLANNING AND ROUTING:<\/strong> Problems, Concepts and Algorithms.\r\n<strong>MODELLING AND SIMULATION:<\/strong> Gate Level Modelling and Simulation, Switch level Modelling and Simulation.\r\n\r\n<strong>UNIT -IV : LOGIC SYNTHESIS AND VERIFICATION:<\/strong> Basic issues and Terminology, Binary-Decision diagrams, Two-Level logic Synthesis.\r\n<strong>HIGH-LEVEL SYNTHESIS:<\/strong> Hardware Models, Internal representation of the input Algorithm, Allocation, Assignment and Scheduling, Some Scheduling Algorithms, Some aspects of Assignment problem, High-level Transformations.\r\n\r\n<strong>UNIT- V : PHYSICAL DESIGN AUTOMATION OF FPGAs:<\/strong> FPGA technologies, Physical Design cycle for FPGAs, partitioning and Routing for segmented and staggered Models. PHYSICAL DESIGN AUTOMATION OF MCMs : MCM technologies, MCM physical design cycle, Partitioning, Placement &#8211; Chip Array based and Full Custom Approaches, Routing \u2013 Maze routing, Multiple stage routing, Topologic routing, Integrated Pin \u2013 Distribution and routing, Routing and Programmable MCMs.\r\n\r\n<strong>TEXT BOOKS:<\/strong>\r\n<ul>\r\n \t<li>S.H. Gerez, \u201cAlgorithms for VLSI Design Automation\u201d, 1999, WILEY Student Edition, John Wiley &amp; Sons (Asia) Pvt. Ltd.<\/li>\r\n \t<li>Naveed Sherwani, \u201cAlgorithms for VLSI Physical Design Automation\u201d, 3rd Edition, 2005, Springer International Edition.<\/li>\r\n<\/ul>\r\n<strong>REFERENCE BOOKS:<\/strong>\r\n<ul>\r\n \t<li>Hill &amp; Peterson, \u201cComputer Aided Logical Design with Emphasis on VLSI\u201d, 1993, Wiley.<\/li>\r\n \t<li>Wayne Wolf, \u201cModern VLSI Design: Systems on silicon\u201d, 2nd ed., 1998, Pearson Education Asia.<\/li>\r\n<\/ul>\r\nFor all other M.Tech 1st Year 1st Sem syllabus go to <a href=\"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-first-year-first-sem-vlsi-vlsi-design-vlsi-system-design-for-m-tech-2017-2018-r17-batch\/\">JNTUH M.Tech VLSI\/ VLSI Design\/VLSI System Design 1st Year 1st Sem Course Structure for (R17) Batch.<\/a>\r\n\r\nAll details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.\r\n\r\nDo share with friends and in case of questions please feel free drop a comment.\n\n<h2>Download iStudy App (Android &amp; iOS)<\/h2>\n<div style=\"width: 100%;text-align: center;background: #f0f7ff;border: 1px solid #d9e8ff;border-radius: 10px;padding: 12px 10px;margin: 8px 0 12px 0\">\n<p style=\"margin: 0 0 8px 0\">Get instant JNTUH updates, timetables, results, and notices on mobile.<\/p>\n<div style=\"justify-content: center;align-items: flex-start;gap: 24px;flex-wrap: wrap\">\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><img decoding=\"async\" style=\"height: 54px;width: auto\" src=\"https:\/\/play.google.com\/intl\/en_us\/badges\/static\/images\/badges\/en_badge_web_generic.png\" alt=\"Get it on Google Play\" \/>\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\u00a0<img decoding=\"async\" style=\"height: 80px;width: 80px\" src=\"https:\/\/api.qrserver.com\/v1\/create-qr-code\/?size=120x120&amp;data=https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" alt=\"Android app QR code\" \/><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\">Android App<\/a><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><img decoding=\"async\" style=\"height: 40px;width: auto\" src=\"https:\/\/upload.wikimedia.org\/wikipedia\/commons\/3\/3c\/Download_on_the_App_Store_Badge.svg\" alt=\"Download on the App Store\" \/>\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\u00a0<img decoding=\"async\" style=\"height: 80px;width: 80px\" src=\"https:\/\/api.qrserver.com\/v1\/create-qr-code\/?size=120x120&amp;data=https:\/\/apps.apple.com\/us\/app\/istudy-app-syllabus-papers\/id6478500231\" alt=\"iOS app QR code\" \/><\/div>\n<div>\u00a0<\/div>\n<div style=\"flex-direction: column;align-items: center;gap: 2px\"><a href=\"https:\/\/apps.apple.com\/us\/app\/istudy-app-syllabus-papers\/id6478500231\" target=\"_blank\" rel=\"noopener\">iOS App <\/a><\/div>\n<\/div>\n<\/div>\n\n\n<p class=\"wp-block-paragraph\"><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Algorithms for VLSI Design Automation Detailed Syllabus for VLSI\/ VLSI Design\/VLSI System Design M.Tech first year first sem is covered here. This gives the details about credits, number of hours [&hellip;]<\/p>\n","protected":false},"author":2259,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[73,62],"tags":[],"class_list":["post-8999","post","type-post","status-publish","format-standard","hentry","category-m-tech","category-syllabus"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/8999","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/users\/2259"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/comments?post=8999"}],"version-history":[{"count":5,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/8999\/revisions"}],"predecessor-version":[{"id":40635,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/8999\/revisions\/40635"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/media?parent=8999"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/categories?post=8999"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/tags?post=8999"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}