{"id":6105,"date":"2018-01-25T14:33:15","date_gmt":"2018-01-25T14:33:15","guid":{"rendered":"http:\/\/www.inspirenignite.com\/jntuh\/?p=6105"},"modified":"2019-07-15T10:31:10","modified_gmt":"2019-07-15T10:31:10","slug":"jntuh-b-tech-2016-2017-r16-detailed-syllabus-vlsi-design","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-b-tech-2016-2017-r16-detailed-syllabus-vlsi-design\/","title":{"rendered":"JNTUH B.Tech 2016-2017 (R16) Detailed Syllabus VLSI Design"},"content":{"rendered":"<p><em>VLSI Design Detailed Syllabus for B.Tech third year second sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.<\/em><\/p>\n<p><em>The detailed syllabus for VLSI Design B.Tech 2016-2017 (R16) third year second sem is as follows.<\/em><\/p>\n<p>B.Tech. III Year II Sem. \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 L\/T\/P\/C<br \/>\nCourse Code:BM613PE \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 3\/0\/0\/3<\/p>\n<p><strong>Course Objectives:<\/strong> The objectives of the course are to:<\/p>\n<ul>\n<li>Give exposure to different steps involved in the fabrication of ICs using MOS\u00a0transistor, CMOS\/BICMOS transistors, and passive components.<\/li>\n<li>Explain electrical properties of MOS and BiCMOS devices to analyze the behavior of\u00a0inverters designed with various loads.<\/li>\n<li>Give exposure to the design rules to be followed to draw the layout of any logic\u00a0circuit.<\/li>\n<li>Provide concept to design different types of logic gates using CMOS inverter and\u00a0analyze their transfer characteristics.<\/li>\n<li>Provide design concepts to design building blocks of data path of any system using\u00a0gates.<\/li>\n<li>Understand basic programmable logic devices and testing of CMOS circuits.<\/li>\n<\/ul>\n<p><strong>Course Outcomes:<\/strong> Upon successfully completing the course, the student should be able to:<\/p>\n<ul>\n<li>Acquire qualitative knowledge about the fabrication process of integrated circuit\u00a0using MOS transistors.<\/li>\n<li>Choose an appropriate inverter depending on specifications required for a circuit<\/li>\n<li>Draw the layout of any logic circuit which helps to understand and estimate parasitic\u00a0of any logic circuit<\/li>\n<li>Design different types of logic gates using CMOS inverter and analyze their transfer\u00a0characteristics<\/li>\n<li>Provide design concepts required to design building blocks of data path using gates.<\/li>\n<li>Design simple memories using MOS transistors and can understand design of large\u00a0memories.<\/li>\n<li>Design simple logic circuit using PLA, PAL, FPGA and CPLD.<\/li>\n<li>Understand different types of faults that can occur in a system and learn the concept\u00a0of testing and adding extra hardware to improve testability of system<\/li>\n<\/ul>\n<p><strong>UNIT \u2013 I: \u00a0Introduction:<\/strong> Introduction to IC Technology \u2013 MOS, PMOS, NMOS, CMOS &amp; BiCMOS<br \/>\nBasic Electrical Properties: Basic Electrical Properties of MOS and BiCMOS Circuits: IdsVds\u00a0relationships, MOS transistor threshold Voltage, gm, gds, Figure of merit \u03c9o; Pass\u00a0transistor, NMOS Inverter, Various pull ups, CMOS Inverter analysis and design, Bi-CMOS\u00a0Inverters.<\/p>\n<p><strong>UNIT &#8211; II:\u00a0VLSI Circuit Design Processes:<\/strong> VLSI Design Flow, MOS Layers, Stick Diagrams, Design<br \/>\nRules and Layout, 2 \u00b5m CMOS Design rules for wires, Contacts and Transistors Layout\u00a0Diagrams for NMOS and CMOS Inverters and Gates, Scaling of MOS circuits.<\/p>\n<p><strong>UNIT \u2013 III: \u00a0Gate Level Design:<\/strong> Logic Gates and Other complex gates, Switch logic, Alternate gate<br \/>\ncircuits, Time delays, Driving large capacitive loads, Wiring capacitance, Fan \u2013 in, Fan \u2013 out,\u00a0Choice of layers.<\/p>\n<p style=\"text-align: center\"><a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\"><strong><span style=\"color: #ff0000\">Download iStudy Android App for complete JNTUH syllabus, results, timetables and all other updates. There are no ads and no pdfs and will make your life way easier<\/span>.<\/strong><\/a><\/p>\n<p><strong>TEXT BOOKS:<\/strong><\/p>\n<ul>\n<li>Essentials of VLSI circuits and systems \u2013 Kamran Eshraghian, Eshraghian Dougles\u00a0and A. Pucknell, PHI, 2005 Edition<\/li>\n<li>CMOS VLSI Design \u2013 A Circuits and Systems Perspective, Neil H. E Weste, David\u00a0Harris, Ayan Banerjee, 3rd Ed, Pearson, 2009.<\/li>\n<\/ul>\n<p><strong>REFERENCE BOOKS:<\/strong><\/p>\n<ul>\n<li>CMOS logic circuit Design &#8211; John .P. Uyemura, Springer, 2007.<\/li>\n<li>Modern VLSI Design &#8211; Wayne Wolf, Pearson Education, 3rd Edition, 1997.<\/li>\n<\/ul>\n<p><em>For all other B.Tech 3rd Year 2nd Sem syllabus go to <a href=\"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-third-year-second-sem-biomedical-engineering-course-structure-2016-2017-r16-batch\/\">JNTUH B.Tech Biomedical Engineering 3rd\u00a0Year 2nd Sem Course Structure for (R16) Batch.<\/a><\/em><\/p>\n<p>All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.<\/p>\n<p>Do share with friends and in case of questions please feel free drop a comment.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>VLSI Design Detailed Syllabus for B.Tech third year second sem is covered here. This gives the details about credits, number of hours and other details along with reference books for [&hellip;]<\/p>\n","protected":false},"author":2259,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[62],"tags":[],"class_list":["post-6105","post","type-post","status-publish","format-standard","hentry","category-syllabus"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/6105","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/users\/2259"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/comments?post=6105"}],"version-history":[{"count":2,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/6105\/revisions"}],"predecessor-version":[{"id":18682,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/6105\/revisions\/18682"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/media?parent=6105"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/categories?post=6105"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/tags?post=6105"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}